Commit 426788b5 authored by Dimitris Lampridis's avatar Dimitris Lampridis

hdl/sim: sanitized and updated SVEC simulation. Tested with ModelSIM 10.2a, works.

parent 2e05f2a2
hdl/ip_cores/.lso
hdl/ip_cores/_xmsgs
hdl/*/sim/transcript
hdl/*/sim/vsim.wlf
hdl/*/sim/Makefile
hdl/*/sim/modelsim.ini
hdl/*/sim/work/
hdl/*/sim/*/transcript
hdl/*/sim/*/vsim.wlf
hdl/*/sim/*/Makefile
hdl/*/sim/*/modelsim.ini
hdl/*/sim/*/work/
hdl/*/testbench/top/transcript
hdl/*/testbench/top/vsim.wlf
hdl/*/testbench/top/Makefile
......
......@@ -559,7 +559,8 @@
parameter TWLO = 9000; // tWLO ps Write levelization output delay
parameter TAA_MIN = 12500; // TAA ps Internal READ command to first data
parameter CL_TIME = 12500; // CL ps Minimum CAS Latency
`else `define sg25 // sg25 is equivalent to the JEDEC DDR3-800E (6-6-6) speed bin
`else
`define sg25 // sg25 is equivalent to the JEDEC DDR3-800E (6-6-6) speed bin
parameter TCK_MIN = 2500; // tCK ps Minimum Clock Cycle Time
parameter TJIT_PER = 100; // tJIT(per) ps Period JItter
parameter TJIT_CC = 200; // tJIT(cc) ps Cycle to Cycle jitter
......
########################################
# This file was generated by hdlmake #
# http://ohwr.org/projects/hdl-make/ #
########################################
## variables #############################
PWD := $(shell pwd)
MODELSIM_INI_PATH := /opt/modelsim_10.0c/modeltech
VCOM_FLAGS := -quiet -modelsimini modelsim.ini
VSIM_FLAGS :=
VLOG_FLAGS := -quiet -modelsimini modelsim.ini
VERILOG_SRC := main.sv \
../2048Mb_ddr3/ddr3.v \
../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master/sockit_owm.v \
../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_clgen.v \
../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_shift.v \
../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_top.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/lm32_allprofiles.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_mc_arithmetic.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/jtag_cores.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_adder.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_addsub.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_logic_op.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_shifter.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic/lm32_multiplier.v \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic/jtag_tap.v \
VERILOG_OBJ := work/main/.main_sv \
work/ddr3/.ddr3_v \
work/sockit_owm/.sockit_owm_v \
work/spi_clgen/.spi_clgen_v \
work/spi_shift/.spi_shift_v \
work/spi_top/.spi_top_v \
work/lm32_allprofiles/.lm32_allprofiles_v \
work/lm32_mc_arithmetic/.lm32_mc_arithmetic_v \
work/jtag_cores/.jtag_cores_v \
work/lm32_adder/.lm32_adder_v \
work/lm32_addsub/.lm32_addsub_v \
work/lm32_logic_op/.lm32_logic_op_v \
work/lm32_shifter/.lm32_shifter_v \
work/lm32_multiplier/.lm32_multiplier_v \
work/jtag_tap/.jtag_tap_v \
VHDL_SRC := ../../../ip_cores/adc_sync_fifo.vhd \
../../../ip_cores/multishot_dpram.vhd \
../../../ip_cores/wb_ddr_fifo.vhd \
../../../ip_cores/adc_serdes.vhd \
../../../ip_cores/monostable/monostable_rtl.vhd \
../../../ip_cores/utils/utils_pkg.vhd \
../../../ip_cores/ext_pulse_sync/ext_pulse_sync_rtl.vhd \
../../rtl/bicolor_led_ctrl_pkg.vhd \
../../rtl/carrier_csr.vhd \
../../rtl/bicolor_led_ctrl.vhd \
../../../ip_cores/general-cores/modules/genrams/genram_pkg.vhd \
../../../ip_cores/timetag_core/rtl/timetag_core_pkg.vhd \
../../../adc/rtl/fmc_adc_100Ms_core_pkg.vhd \
../../../adc/rtl/fmc_adc_mezzanine_pkg.vhd \
../../../ip_cores/general-cores/modules/wishbone/wishbone_pkg.vhd \
../../rtl/sdb_meta_pkg.vhd \
../../../adc/rtl/fmc_adc_100Ms_csr.vhd \
../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_pkg.vhd \
../../../adc/rtl/offset_gain_s.vhd \
../../../ip_cores/timetag_core/rtl/timetag_core_regs.vhd \
../../../ip_cores/timetag_core/rtl/timetag_core.vhd \
../../../ip_cores/general-cores/modules/common/gencores_pkg.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_pkg.vhd \
../../../ip_cores/general-cores/modules/common/gc_crc_gen.vhd \
../../../ip_cores/general-cores/modules/common/gc_moving_average.vhd \
../../../ip_cores/general-cores/modules/common/gc_extend_pulse.vhd \
../../../ip_cores/general-cores/modules/common/gc_delay_gen.vhd \
../../../ip_cores/general-cores/modules/common/gc_dual_pi_controller.vhd \
../../../ip_cores/general-cores/modules/common/gc_reset.vhd \
../../../ip_cores/general-cores/modules/common/gc_serial_dac.vhd \
../../../ip_cores/general-cores/modules/common/gc_sync_ffs.vhd \
../../../ip_cores/general-cores/modules/common/gc_arbitrated_mux.vhd \
../../../ip_cores/general-cores/modules/common/gc_pulse_synchronizer.vhd \
../../../ip_cores/general-cores/modules/common/gc_pulse_synchronizer2.vhd \
../../../ip_cores/general-cores/modules/common/gc_frequency_meter.vhd \
../../../ip_cores/general-cores/modules/common/gc_rr_arbiter.vhd \
../../../ip_cores/general-cores/modules/common/gc_prio_encoder.vhd \
../../../ip_cores/general-cores/modules/common/gc_word_packer.vhd \
../../../ip_cores/general-cores/modules/common/gc_big_adder.vhd \
../../../adc/rtl/fmc_adc_100Ms_core.vhd \
../../../ip_cores/general-cores/modules/genrams/memory_loader_pkg.vhd \
../../../ip_cores/general-cores/modules/genrams/generic_shiftreg_fifo.vhd \
../../../ip_cores/general-cores/modules/genrams/inferred_sync_fifo.vhd \
../../../ip_cores/general-cores/modules/genrams/inferred_async_fifo.vhd \
../../../adc/rtl/fmc_adc_mezzanine.vhd \
../../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram.vhd \
../../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_sameclock.vhd \
../../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_dualclock.vhd \
../../../ip_cores/general-cores/modules/genrams/xilinx/generic_simple_dpram.vhd \
../../../ip_cores/general-cores/modules/genrams/xilinx/generic_spram.vhd \
../../../ip_cores/general-cores/modules/genrams/xilinx/gc_shiftreg.vhd \
../../../ip_cores/general-cores/modules/genrams/generic/generic_async_fifo.vhd \
../../../ip_cores/general-cores/modules/genrams/generic/generic_sync_fifo.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_async_bridge/wb_async_bridge.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_async_bridge/xwb_async_bridge.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master/wb_onewire_master.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master/xwb_onewire_master.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_bit_ctrl.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_byte_ctrl.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_top.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/wb_i2c_master.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_bus_fanout/xwb_bus_fanout.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_dpram/xwb_dpram.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_gpio_port/wb_gpio_port.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_gpio_port/xwb_gpio_port.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_simple_timer/wb_tics.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_simple_timer/xwb_tics.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_rx.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_tx.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_baud_gen.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_pkg.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_wb.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/wb_simple_uart.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_uart/xwb_simple_uart.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_vic/vic_prio_enc.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_vic/wb_slave_vic.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_vic/wb_vic.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_vic/xwb_vic.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_spi/wb_spi.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_spi/xwb_spi.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_crossbar/sdb_rom.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_crossbar.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_sdb_crossbar.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_pkg.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_irq/irqm_core.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_lm32.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_slave.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_master.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_timer.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/xwb_lm32.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_dp_ram.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_ram.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_dma/xwb_dma.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_dma/xwb_streamer.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_spi_flash/wb_spi_flash.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/simple_pwm_wbgen2_pkg.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/simple_pwm_wb.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/wb_simple_pwm.vhd \
../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/xwb_simple_pwm.vhd \
../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_dpssram.vhd \
../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_eic.vhd \
../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_async.vhd \
../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_sync.vhd \
../../../adc/rtl/fmc_adc_eic.vhd \
../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/xloader_registers_pkg.vhd \
../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/xwb_xilinx_fpga_loader.vhd \
../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd \
../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/xloader_wb.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wb.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper_pkg.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/xvme64x_core_pkg.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/ddr3_ctrl_svec_bank4_64b_32b.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/memc4_infrastructure.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/memc4_wrapper.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/iodrp_controller.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/iodrp_mcb_controller.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/mcb_raw_wrapper.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/mcb_soft_calibration_top.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/mcb_soft_calibration.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/ddr3_ctrl_svec_bank5_64b_32b.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/memc5_infrastructure.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/memc5_wrapper.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/iodrp_controller.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/iodrp_mcb_controller.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/mcb_raw_wrapper.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/mcb_soft_calibration_top.vhd \
../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/mcb_soft_calibration.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/vme64x_pack.vhd \
../../rtl/svec_top_fmc_adc_100Ms.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CR_pack.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/xvme64x_core.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Access_Decode.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Am_Match.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_bus.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CSR_pack.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME64xCore_Top.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CR_CSR_Space.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CRAM.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Funct_Match.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Init.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_IRQ_Controller.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_SharedComps.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_swapper.vhd \
../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Wb_master.vhd \
VHDL_OBJ := work/adc_sync_fifo/.adc_sync_fifo_vhd \
work/multishot_dpram/.multishot_dpram_vhd \
work/wb_ddr_fifo/.wb_ddr_fifo_vhd \
work/adc_serdes/.adc_serdes_vhd \
work/monostable_rtl/.monostable_rtl_vhd \
work/utils_pkg/.utils_pkg_vhd \
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl_vhd \
work/bicolor_led_ctrl_pkg/.bicolor_led_ctrl_pkg_vhd \
work/carrier_csr/.carrier_csr_vhd \
work/bicolor_led_ctrl/.bicolor_led_ctrl_vhd \
work/genram_pkg/.genram_pkg_vhd \
work/timetag_core_pkg/.timetag_core_pkg_vhd \
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd \
work/fmc_adc_mezzanine_pkg/.fmc_adc_mezzanine_pkg_vhd \
work/wishbone_pkg/.wishbone_pkg_vhd \
work/sdb_meta_pkg/.sdb_meta_pkg_vhd \
work/fmc_adc_100Ms_csr/.fmc_adc_100Ms_csr_vhd \
work/wbgen2_pkg/.wbgen2_pkg_vhd \
work/offset_gain_s/.offset_gain_s_vhd \
work/timetag_core_regs/.timetag_core_regs_vhd \
work/timetag_core/.timetag_core_vhd \
work/gencores_pkg/.gencores_pkg_vhd \
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd \
work/gc_crc_gen/.gc_crc_gen_vhd \
work/gc_moving_average/.gc_moving_average_vhd \
work/gc_extend_pulse/.gc_extend_pulse_vhd \
work/gc_delay_gen/.gc_delay_gen_vhd \
work/gc_dual_pi_controller/.gc_dual_pi_controller_vhd \
work/gc_reset/.gc_reset_vhd \
work/gc_serial_dac/.gc_serial_dac_vhd \
work/gc_sync_ffs/.gc_sync_ffs_vhd \
work/gc_arbitrated_mux/.gc_arbitrated_mux_vhd \
work/gc_pulse_synchronizer/.gc_pulse_synchronizer_vhd \
work/gc_pulse_synchronizer2/.gc_pulse_synchronizer2_vhd \
work/gc_frequency_meter/.gc_frequency_meter_vhd \
work/gc_rr_arbiter/.gc_rr_arbiter_vhd \
work/gc_prio_encoder/.gc_prio_encoder_vhd \
work/gc_word_packer/.gc_word_packer_vhd \
work/gc_big_adder/.gc_big_adder_vhd \
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd \
work/memory_loader_pkg/.memory_loader_pkg_vhd \
work/generic_shiftreg_fifo/.generic_shiftreg_fifo_vhd \
work/inferred_sync_fifo/.inferred_sync_fifo_vhd \
work/inferred_async_fifo/.inferred_async_fifo_vhd \
work/fmc_adc_mezzanine/.fmc_adc_mezzanine_vhd \
work/generic_dpram/.generic_dpram_vhd \
work/generic_dpram_sameclock/.generic_dpram_sameclock_vhd \
work/generic_dpram_dualclock/.generic_dpram_dualclock_vhd \
work/generic_simple_dpram/.generic_simple_dpram_vhd \
work/generic_spram/.generic_spram_vhd \
work/gc_shiftreg/.gc_shiftreg_vhd \
work/generic_async_fifo/.generic_async_fifo_vhd \
work/generic_sync_fifo/.generic_sync_fifo_vhd \
work/wb_async_bridge/.wb_async_bridge_vhd \
work/xwb_async_bridge/.xwb_async_bridge_vhd \
work/wb_onewire_master/.wb_onewire_master_vhd \
work/xwb_onewire_master/.xwb_onewire_master_vhd \
work/i2c_master_bit_ctrl/.i2c_master_bit_ctrl_vhd \
work/i2c_master_byte_ctrl/.i2c_master_byte_ctrl_vhd \
work/i2c_master_top/.i2c_master_top_vhd \
work/wb_i2c_master/.wb_i2c_master_vhd \
work/xwb_i2c_master/.xwb_i2c_master_vhd \
work/xwb_bus_fanout/.xwb_bus_fanout_vhd \
work/xwb_dpram/.xwb_dpram_vhd \
work/wb_gpio_port/.wb_gpio_port_vhd \
work/xwb_gpio_port/.xwb_gpio_port_vhd \
work/wb_tics/.wb_tics_vhd \
work/xwb_tics/.xwb_tics_vhd \
work/uart_async_rx/.uart_async_rx_vhd \
work/uart_async_tx/.uart_async_tx_vhd \
work/uart_baud_gen/.uart_baud_gen_vhd \
work/simple_uart_pkg/.simple_uart_pkg_vhd \
work/simple_uart_wb/.simple_uart_wb_vhd \
work/wb_simple_uart/.wb_simple_uart_vhd \
work/xwb_simple_uart/.xwb_simple_uart_vhd \
work/vic_prio_enc/.vic_prio_enc_vhd \
work/wb_slave_vic/.wb_slave_vic_vhd \
work/wb_vic/.wb_vic_vhd \
work/xwb_vic/.xwb_vic_vhd \
work/wb_spi/.wb_spi_vhd \
work/xwb_spi/.xwb_spi_vhd \
work/sdb_rom/.sdb_rom_vhd \
work/xwb_crossbar/.xwb_crossbar_vhd \
work/xwb_sdb_crossbar/.xwb_sdb_crossbar_vhd \
work/wb_irq_pkg/.wb_irq_pkg_vhd \
work/irqm_core/.irqm_core_vhd \
work/wb_irq_lm32/.wb_irq_lm32_vhd \
work/wb_irq_slave/.wb_irq_slave_vhd \
work/wb_irq_master/.wb_irq_master_vhd \
work/wb_irq_timer/.wb_irq_timer_vhd \
work/xwb_lm32/.xwb_lm32_vhd \
work/lm32_dp_ram/.lm32_dp_ram_vhd \
work/lm32_ram/.lm32_ram_vhd \
work/wb_slave_adapter/.wb_slave_adapter_vhd \
work/xwb_clock_crossing/.xwb_clock_crossing_vhd \
work/xwb_dma/.xwb_dma_vhd \
work/xwb_streamer/.xwb_streamer_vhd \
work/wb_serial_lcd/.wb_serial_lcd_vhd \
work/wb_spi_flash/.wb_spi_flash_vhd \
work/simple_pwm_wbgen2_pkg/.simple_pwm_wbgen2_pkg_vhd \
work/simple_pwm_wb/.simple_pwm_wb_vhd \
work/wb_simple_pwm/.wb_simple_pwm_vhd \
work/xwb_simple_pwm/.xwb_simple_pwm_vhd \
work/wbgen2_dpssram/.wbgen2_dpssram_vhd \
work/wbgen2_eic/.wbgen2_eic_vhd \
work/wbgen2_fifo_async/.wbgen2_fifo_async_vhd \
work/wbgen2_fifo_sync/.wbgen2_fifo_sync_vhd \
work/fmc_adc_eic/.fmc_adc_eic_vhd \
work/xloader_registers_pkg/.xloader_registers_pkg_vhd \
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader_vhd \
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader_vhd \
work/xloader_wb/.xloader_wb_vhd \
work/ddr3_ctrl/.ddr3_ctrl_vhd \
work/ddr3_ctrl_wb/.ddr3_ctrl_wb_vhd \
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg_vhd \
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper_vhd \
work/xvme64x_core_pkg/.xvme64x_core_pkg_vhd \
work/ddr3_ctrl_svec_bank4_64b_32b/.ddr3_ctrl_svec_bank4_64b_32b_vhd \
work/memc4_infrastructure/.memc4_infrastructure_vhd \
work/memc4_wrapper/.memc4_wrapper_vhd \
work/iodrp_controller/.iodrp_controller_vhd \
work/iodrp_mcb_controller/.iodrp_mcb_controller_vhd \
work/mcb_raw_wrapper/.mcb_raw_wrapper_vhd \
work/mcb_soft_calibration_top/.mcb_soft_calibration_top_vhd \
work/mcb_soft_calibration/.mcb_soft_calibration_vhd \
work/ddr3_ctrl_svec_bank5_64b_32b/.ddr3_ctrl_svec_bank5_64b_32b_vhd \
work/memc5_infrastructure/.memc5_infrastructure_vhd \
work/memc5_wrapper/.memc5_wrapper_vhd \
work/iodrp_controller/.iodrp_controller_vhd \
work/iodrp_mcb_controller/.iodrp_mcb_controller_vhd \
work/mcb_raw_wrapper/.mcb_raw_wrapper_vhd \
work/mcb_soft_calibration_top/.mcb_soft_calibration_top_vhd \
work/mcb_soft_calibration/.mcb_soft_calibration_vhd \
work/vme64x_pack/.vme64x_pack_vhd \
work/svec_top_fmc_adc_100Ms/.svec_top_fmc_adc_100Ms_vhd \
work/VME_CR_pack/.VME_CR_pack_vhd \
work/xvme64x_core/.xvme64x_core_vhd \
work/VME_Access_Decode/.VME_Access_Decode_vhd \
work/VME_Am_Match/.VME_Am_Match_vhd \
work/VME_bus/.VME_bus_vhd \
work/VME_CSR_pack/.VME_CSR_pack_vhd \
work/VME64xCore_Top/.VME64xCore_Top_vhd \
work/VME_CR_CSR_Space/.VME_CR_CSR_Space_vhd \
work/VME_CRAM/.VME_CRAM_vhd \
work/VME_Funct_Match/.VME_Funct_Match_vhd \
work/VME_Init/.VME_Init_vhd \
work/VME_IRQ_Controller/.VME_IRQ_Controller_vhd \
work/VME_SharedComps/.VME_SharedComps_vhd \
work/VME_swapper/.VME_swapper_vhd \
work/VME_Wb_master/.VME_Wb_master_vhd \
LIBS := work
LIB_IND := work/.work
## rules #################################
sim: modelsim.ini $(LIB_IND) $(VERILOG_OBJ) $(VHDL_OBJ)
$(VERILOG_OBJ): $(VHDL_OBJ)
$(VHDL_OBJ): $(LIB_IND) modelsim.ini
modelsim.ini: $(MODELSIM_INI_PATH)/modelsim.ini
cp $< .
clean:
rm -rf ./modelsim.ini $(LIBS)
.PHONY: clean
work/.work:
(vlib work && vmap -modelsimini modelsim.ini work && touch work/.work )|| rm -rf work
work/main/.main_sv: main.sv
vlog -work work $(VLOG_FLAGS) -sv +incdir+. +incdir+../vme64x_bfm +incdir+../2048Mb_ddr3 $<
@mkdir -p $(dir $@) && touch $@
work/ddr3/.ddr3_v: ../2048Mb_ddr3/ddr3.v ../2048Mb_ddr3/ddr3_parameters.vh
vlog -work work $(VLOG_FLAGS) +incdir+../2048Mb_ddr3 +define+sg15E +define+x16 $<
@mkdir -p $(dir $@) && touch $@
work/sockit_owm/.sockit_owm_v: ../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master/sockit_owm.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master $<
@mkdir -p $(dir $@) && touch $@
work/spi_clgen/.spi_clgen_v: ../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_clgen.v ../../../ip_cores/general-cores/modules/wishbone/wb_spi/timescale.v ../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_defines.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_spi $<
@mkdir -p $(dir $@) && touch $@
work/spi_shift/.spi_shift_v: ../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_shift.v ../../../ip_cores/general-cores/modules/wishbone/wb_spi/timescale.v ../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_defines.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_spi $<
@mkdir -p $(dir $@) && touch $@
work/spi_top/.spi_top_v: ../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_top.v ../../../ip_cores/general-cores/modules/wishbone/wb_spi/timescale.v ../../../ip_cores/general-cores/modules/wishbone/wb_spi/spi_defines.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_spi $<
@mkdir -p $(dir $@) && touch $@
work/lm32_allprofiles/.lm32_allprofiles_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/lm32_allprofiles.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/generated $<
@mkdir -p $(dir $@) && touch $@
work/lm32_mc_arithmetic/.lm32_mc_arithmetic_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_mc_arithmetic.v ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_include.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src $<
@mkdir -p $(dir $@) && touch $@
work/jtag_cores/.jtag_cores_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/jtag_cores.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src $<
@mkdir -p $(dir $@) && touch $@
work/lm32_adder/.lm32_adder_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_adder.v ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_include.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src $<
@mkdir -p $(dir $@) && touch $@
work/lm32_addsub/.lm32_addsub_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_addsub.v ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_include.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src $<
@mkdir -p $(dir $@) && touch $@
work/lm32_logic_op/.lm32_logic_op_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_logic_op.v ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_include.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src $<
@mkdir -p $(dir $@) && touch $@
work/lm32_shifter/.lm32_shifter_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_shifter.v ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_include.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src $<
@mkdir -p $(dir $@) && touch $@
work/lm32_multiplier/.lm32_multiplier_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic/lm32_multiplier.v ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic/../../src/lm32_include.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic $<
@mkdir -p $(dir $@) && touch $@
work/jtag_tap/.jtag_tap_v: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic/jtag_tap.v
vlog -work work $(VLOG_FLAGS) +incdir+../../../ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic $<
@mkdir -p $(dir $@) && touch $@
work/adc_sync_fifo/.adc_sync_fifo_vhd: ../../../ip_cores/adc_sync_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/multishot_dpram/.multishot_dpram_vhd: ../../../ip_cores/multishot_dpram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_ddr_fifo/.wb_ddr_fifo_vhd: ../../../ip_cores/wb_ddr_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/adc_serdes/.adc_serdes_vhd: ../../../ip_cores/adc_serdes.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/monostable_rtl/.monostable_rtl_vhd: ../../../ip_cores/monostable/monostable_rtl.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/utils_pkg/.utils_pkg_vhd: ../../../ip_cores/utils/utils_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl_vhd: ../../../ip_cores/ext_pulse_sync/ext_pulse_sync_rtl.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl: \
work/utils_pkg/.utils_pkg
work/bicolor_led_ctrl_pkg/.bicolor_led_ctrl_pkg_vhd: ../../rtl/bicolor_led_ctrl_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/carrier_csr/.carrier_csr_vhd: ../../rtl/carrier_csr.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/bicolor_led_ctrl/.bicolor_led_ctrl_vhd: ../../rtl/bicolor_led_ctrl.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/bicolor_led_ctrl/.bicolor_led_ctrl: \
work/bicolor_led_ctrl_pkg/.bicolor_led_ctrl_pkg
work/genram_pkg/.genram_pkg_vhd: ../../../ip_cores/general-cores/modules/genrams/genram_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/timetag_core_pkg/.timetag_core_pkg_vhd: ../../../ip_cores/timetag_core/rtl/timetag_core_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd: ../../../adc/rtl/fmc_adc_100Ms_core_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg: \
work/timetag_core_pkg/.timetag_core_pkg
work/fmc_adc_mezzanine_pkg/.fmc_adc_mezzanine_pkg_vhd: ../../../adc/rtl/fmc_adc_mezzanine_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/fmc_adc_mezzanine_pkg/.fmc_adc_mezzanine_pkg: \
work/timetag_core_pkg/.timetag_core_pkg
work/wishbone_pkg/.wishbone_pkg_vhd: ../../../ip_cores/general-cores/modules/wishbone/wishbone_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wishbone_pkg/.wishbone_pkg: \
work/genram_pkg/.genram_pkg
work/sdb_meta_pkg/.sdb_meta_pkg_vhd: ../../rtl/sdb_meta_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/sdb_meta_pkg/.sdb_meta_pkg: \
work/wishbone_pkg/.wishbone_pkg
work/fmc_adc_100Ms_csr/.fmc_adc_100Ms_csr_vhd: ../../../adc/rtl/fmc_adc_100Ms_csr.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wbgen2_pkg/.wbgen2_pkg_vhd: ../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/offset_gain_s/.offset_gain_s_vhd: ../../../adc/rtl/offset_gain_s.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/timetag_core_regs/.timetag_core_regs_vhd: ../../../ip_cores/timetag_core/rtl/timetag_core_regs.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/timetag_core/.timetag_core_vhd: ../../../ip_cores/timetag_core/rtl/timetag_core.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/timetag_core/.timetag_core: \
work/timetag_core_pkg/.timetag_core_pkg
work/gencores_pkg/.gencores_pkg_vhd: ../../../ip_cores/general-cores/modules/common/gencores_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gencores_pkg/.gencores_pkg: \
work/genram_pkg/.genram_pkg
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_crc_gen/.gc_crc_gen_vhd: ../../../ip_cores/general-cores/modules/common/gc_crc_gen.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_crc_gen/.gc_crc_gen: \
work/gencores_pkg/.gencores_pkg
work/gc_moving_average/.gc_moving_average_vhd: ../../../ip_cores/general-cores/modules/common/gc_moving_average.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_moving_average/.gc_moving_average: \
work/gencores_pkg/.gencores_pkg
work/gc_extend_pulse/.gc_extend_pulse_vhd: ../../../ip_cores/general-cores/modules/common/gc_extend_pulse.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_extend_pulse/.gc_extend_pulse: \
work/genram_pkg/.genram_pkg \
work/gencores_pkg/.gencores_pkg
work/gc_delay_gen/.gc_delay_gen_vhd: ../../../ip_cores/general-cores/modules/common/gc_delay_gen.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_delay_gen/.gc_delay_gen: \
work/gencores_pkg/.gencores_pkg
work/gc_dual_pi_controller/.gc_dual_pi_controller_vhd: ../../../ip_cores/general-cores/modules/common/gc_dual_pi_controller.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_dual_pi_controller/.gc_dual_pi_controller: \
work/gencores_pkg/.gencores_pkg
work/gc_reset/.gc_reset_vhd: ../../../ip_cores/general-cores/modules/common/gc_reset.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_serial_dac/.gc_serial_dac_vhd: ../../../ip_cores/general-cores/modules/common/gc_serial_dac.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_sync_ffs/.gc_sync_ffs_vhd: ../../../ip_cores/general-cores/modules/common/gc_sync_ffs.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_arbitrated_mux/.gc_arbitrated_mux_vhd: ../../../ip_cores/general-cores/modules/common/gc_arbitrated_mux.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_arbitrated_mux/.gc_arbitrated_mux: \
work/genram_pkg/.genram_pkg \
work/gencores_pkg/.gencores_pkg
work/gc_pulse_synchronizer/.gc_pulse_synchronizer_vhd: ../../../ip_cores/general-cores/modules/common/gc_pulse_synchronizer.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_pulse_synchronizer/.gc_pulse_synchronizer: \
work/gencores_pkg/.gencores_pkg
work/gc_pulse_synchronizer2/.gc_pulse_synchronizer2_vhd: ../../../ip_cores/general-cores/modules/common/gc_pulse_synchronizer2.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_pulse_synchronizer2/.gc_pulse_synchronizer2: \
work/gencores_pkg/.gencores_pkg
work/gc_frequency_meter/.gc_frequency_meter_vhd: ../../../ip_cores/general-cores/modules/common/gc_frequency_meter.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_frequency_meter/.gc_frequency_meter: \
work/gencores_pkg/.gencores_pkg
work/gc_rr_arbiter/.gc_rr_arbiter_vhd: ../../../ip_cores/general-cores/modules/common/gc_rr_arbiter.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_prio_encoder/.gc_prio_encoder_vhd: ../../../ip_cores/general-cores/modules/common/gc_prio_encoder.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_word_packer/.gc_word_packer_vhd: ../../../ip_cores/general-cores/modules/common/gc_word_packer.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_word_packer/.gc_word_packer: \
work/genram_pkg/.genram_pkg
work/gc_big_adder/.gc_big_adder_vhd: ../../../ip_cores/general-cores/modules/common/gc_big_adder.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_big_adder/.gc_big_adder: \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd: ../../../adc/rtl/fmc_adc_100Ms_core.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core: \
work/genram_pkg/.genram_pkg \
work/timetag_core_pkg/.timetag_core_pkg
work/memory_loader_pkg/.memory_loader_pkg_vhd: ../../../ip_cores/general-cores/modules/genrams/memory_loader_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/memory_loader_pkg/.memory_loader_pkg: \
work/genram_pkg/.genram_pkg
work/generic_shiftreg_fifo/.generic_shiftreg_fifo_vhd: ../../../ip_cores/general-cores/modules/genrams/generic_shiftreg_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_shiftreg_fifo/.generic_shiftreg_fifo: \
work/genram_pkg/.genram_pkg
work/inferred_sync_fifo/.inferred_sync_fifo_vhd: ../../../ip_cores/general-cores/modules/genrams/inferred_sync_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/inferred_sync_fifo/.inferred_sync_fifo: \
work/genram_pkg/.genram_pkg
work/inferred_async_fifo/.inferred_async_fifo_vhd: ../../../ip_cores/general-cores/modules/genrams/inferred_async_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/inferred_async_fifo/.inferred_async_fifo: \
work/genram_pkg/.genram_pkg
work/fmc_adc_mezzanine/.fmc_adc_mezzanine_vhd: ../../../adc/rtl/fmc_adc_mezzanine.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/fmc_adc_mezzanine/.fmc_adc_mezzanine: \
work/wishbone_pkg/.wishbone_pkg \
work/timetag_core_pkg/.timetag_core_pkg \
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg
work/generic_dpram/.generic_dpram_vhd: ../../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_dpram/.generic_dpram: \
work/genram_pkg/.genram_pkg \
work/memory_loader_pkg/.memory_loader_pkg
work/generic_dpram_sameclock/.generic_dpram_sameclock_vhd: ../../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_sameclock.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_dpram_sameclock/.generic_dpram_sameclock: \
work/genram_pkg/.genram_pkg \
work/memory_loader_pkg/.memory_loader_pkg
work/generic_dpram_dualclock/.generic_dpram_dualclock_vhd: ../../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_dualclock.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_dpram_dualclock/.generic_dpram_dualclock: \
work/genram_pkg/.genram_pkg \
work/memory_loader_pkg/.memory_loader_pkg
work/generic_simple_dpram/.generic_simple_dpram_vhd: ../../../ip_cores/general-cores/modules/genrams/xilinx/generic_simple_dpram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_simple_dpram/.generic_simple_dpram: \
work/genram_pkg/.genram_pkg \
work/memory_loader_pkg/.memory_loader_pkg
work/generic_spram/.generic_spram_vhd: ../../../ip_cores/general-cores/modules/genrams/xilinx/generic_spram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_spram/.generic_spram: \
work/genram_pkg/.genram_pkg
work/gc_shiftreg/.gc_shiftreg_vhd: ../../../ip_cores/general-cores/modules/genrams/xilinx/gc_shiftreg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/gc_shiftreg/.gc_shiftreg: \
work/genram_pkg/.genram_pkg
work/generic_async_fifo/.generic_async_fifo_vhd: ../../../ip_cores/general-cores/modules/genrams/generic/generic_async_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_async_fifo/.generic_async_fifo: \
work/genram_pkg/.genram_pkg
work/generic_sync_fifo/.generic_sync_fifo_vhd: ../../../ip_cores/general-cores/modules/genrams/generic/generic_sync_fifo.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/generic_sync_fifo/.generic_sync_fifo: \
work/genram_pkg/.genram_pkg
work/wb_async_bridge/.wb_async_bridge_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_async_bridge/wb_async_bridge.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_async_bridge/.wb_async_bridge: \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg
work/xwb_async_bridge/.xwb_async_bridge_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_async_bridge/xwb_async_bridge.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_async_bridge/.xwb_async_bridge: \
work/wishbone_pkg/.wishbone_pkg
work/wb_onewire_master/.wb_onewire_master_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master/wb_onewire_master.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_onewire_master/.wb_onewire_master: \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg
work/xwb_onewire_master/.xwb_onewire_master_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_onewire_master/xwb_onewire_master.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_onewire_master/.xwb_onewire_master: \
work/wishbone_pkg/.wishbone_pkg
work/i2c_master_bit_ctrl/.i2c_master_bit_ctrl_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_bit_ctrl.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/i2c_master_byte_ctrl/.i2c_master_byte_ctrl_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_byte_ctrl.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/i2c_master_top/.i2c_master_top_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_top.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_i2c_master/.wb_i2c_master_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/wb_i2c_master.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_i2c_master/.wb_i2c_master: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_i2c_master/.xwb_i2c_master_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_i2c_master/.xwb_i2c_master: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_bus_fanout/.xwb_bus_fanout_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_bus_fanout/xwb_bus_fanout.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_bus_fanout/.xwb_bus_fanout: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_dpram/.xwb_dpram_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_dpram/xwb_dpram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_dpram/.xwb_dpram: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/wb_gpio_port/.wb_gpio_port_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_gpio_port/wb_gpio_port.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_gpio_port/.wb_gpio_port: \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg
work/xwb_gpio_port/.xwb_gpio_port_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_gpio_port/xwb_gpio_port.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_gpio_port/.xwb_gpio_port: \
work/wishbone_pkg/.wishbone_pkg
work/wb_tics/.wb_tics_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_simple_timer/wb_tics.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_tics/.wb_tics: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_tics/.xwb_tics_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_simple_timer/xwb_tics.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_tics/.xwb_tics: \
work/wishbone_pkg/.wishbone_pkg
work/uart_async_rx/.uart_async_rx_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_rx.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/uart_async_tx/.uart_async_tx_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_tx.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/uart_baud_gen/.uart_baud_gen_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_baud_gen.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/simple_uart_pkg/.simple_uart_pkg_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/simple_uart_wb/.simple_uart_wb_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_wb.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/simple_uart_wb/.simple_uart_wb: \
work/simple_uart_pkg/.simple_uart_pkg
work/wb_simple_uart/.wb_simple_uart_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/wb_simple_uart.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_simple_uart/.wb_simple_uart: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg \
work/simple_uart_pkg/.simple_uart_pkg
work/xwb_simple_uart/.xwb_simple_uart_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_uart/xwb_simple_uart.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_simple_uart/.xwb_simple_uart: \
work/wishbone_pkg/.wishbone_pkg
work/vic_prio_enc/.vic_prio_enc_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_vic/vic_prio_enc.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_slave_vic/.wb_slave_vic_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_vic/wb_slave_vic.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_slave_vic/.wb_slave_vic: \
work/wbgen2_pkg/.wbgen2_pkg
work/wb_vic/.wb_vic_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_vic/wb_vic.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_vic/.wb_vic: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/xwb_vic/.xwb_vic_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_vic/xwb_vic.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_vic/.xwb_vic: \
work/wishbone_pkg/.wishbone_pkg
work/wb_spi/.wb_spi_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_spi/wb_spi.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_spi/.wb_spi: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_spi/.xwb_spi_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_spi/xwb_spi.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_spi/.xwb_spi: \
work/wishbone_pkg/.wishbone_pkg
work/sdb_rom/.sdb_rom_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_crossbar/sdb_rom.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/sdb_rom/.sdb_rom: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_crossbar/.xwb_crossbar_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_crossbar.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_crossbar/.xwb_crossbar: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_sdb_crossbar/.xwb_sdb_crossbar_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_sdb_crossbar.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_sdb_crossbar/.xwb_sdb_crossbar: \
work/wishbone_pkg/.wishbone_pkg
work/wb_irq_pkg/.wb_irq_pkg_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_irq_pkg/.wb_irq_pkg: \
work/wishbone_pkg/.wishbone_pkg
work/irqm_core/.irqm_core_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_irq/irqm_core.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/irqm_core/.irqm_core: \
work/wb_irq_pkg/.wb_irq_pkg \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/wb_irq_lm32/.wb_irq_lm32_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_lm32.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_irq_lm32/.wb_irq_lm32: \
work/wb_irq_pkg/.wb_irq_pkg \
work/wishbone_pkg/.wishbone_pkg
work/wb_irq_slave/.wb_irq_slave_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_slave.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_irq_slave/.wb_irq_slave: \
work/wb_irq_pkg/.wb_irq_pkg \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/wb_irq_master/.wb_irq_master_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_master.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_irq_master/.wb_irq_master: \
work/wb_irq_pkg/.wb_irq_pkg \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/wb_irq_timer/.wb_irq_timer_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_irq/wb_irq_timer.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_irq_timer/.wb_irq_timer: \
work/wb_irq_pkg/.wb_irq_pkg \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg
work/xwb_lm32/.xwb_lm32_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/xwb_lm32.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_lm32/.xwb_lm32: \
work/wishbone_pkg/.wishbone_pkg
work/lm32_dp_ram/.lm32_dp_ram_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_dp_ram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/lm32_dp_ram/.lm32_dp_ram: \
work/genram_pkg/.genram_pkg
work/lm32_ram/.lm32_ram_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_lm32/src/lm32_ram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/lm32_ram/.lm32_ram: \
work/genram_pkg/.genram_pkg
work/wb_slave_adapter/.wb_slave_adapter_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_slave_adapter/.wb_slave_adapter: \
work/wishbone_pkg/.wishbone_pkg
work/xwb_clock_crossing/.xwb_clock_crossing_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_clock_crossing/.xwb_clock_crossing: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/xwb_dma/.xwb_dma_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_dma/xwb_dma.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_dma/.xwb_dma: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/xwb_streamer/.xwb_streamer_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_dma/xwb_streamer.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_streamer/.xwb_streamer: \
work/wishbone_pkg/.wishbone_pkg
work/wb_serial_lcd/.wb_serial_lcd_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_serial_lcd/.wb_serial_lcd: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg
work/wb_spi_flash/.wb_spi_flash_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_spi_flash/wb_spi_flash.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_spi_flash/.wb_spi_flash: \
work/genram_pkg/.genram_pkg \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg
work/simple_pwm_wbgen2_pkg/.simple_pwm_wbgen2_pkg_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/simple_pwm_wbgen2_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/simple_pwm_wb/.simple_pwm_wb_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/simple_pwm_wb.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/simple_pwm_wb/.simple_pwm_wb: \
work/simple_pwm_wbgen2_pkg/.simple_pwm_wbgen2_pkg
work/wb_simple_pwm/.wb_simple_pwm_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/wb_simple_pwm.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_simple_pwm/.wb_simple_pwm: \
work/simple_pwm_wbgen2_pkg/.simple_pwm_wbgen2_pkg \
work/wishbone_pkg/.wishbone_pkg
work/xwb_simple_pwm/.xwb_simple_pwm_vhd: ../../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/xwb_simple_pwm.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_simple_pwm/.xwb_simple_pwm: \
work/wishbone_pkg/.wishbone_pkg
work/wbgen2_dpssram/.wbgen2_dpssram_vhd: ../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_dpssram.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wbgen2_dpssram/.wbgen2_dpssram: \
work/wbgen2_pkg/.wbgen2_pkg
work/wbgen2_eic/.wbgen2_eic_vhd: ../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_eic.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wbgen2_eic/.wbgen2_eic: \
work/wbgen2_pkg/.wbgen2_pkg
work/wbgen2_fifo_async/.wbgen2_fifo_async_vhd: ../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_async.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wbgen2_fifo_async/.wbgen2_fifo_async: \
work/wbgen2_pkg/.wbgen2_pkg \
work/genram_pkg/.genram_pkg
work/wbgen2_fifo_sync/.wbgen2_fifo_sync_vhd: ../../../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_sync.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wbgen2_fifo_sync/.wbgen2_fifo_sync: \
work/wbgen2_pkg/.wbgen2_pkg
work/fmc_adc_eic/.fmc_adc_eic_vhd: ../../../adc/rtl/fmc_adc_eic.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/fmc_adc_eic/.fmc_adc_eic: \
work/wbgen2_pkg/.wbgen2_pkg
work/xloader_registers_pkg/.xloader_registers_pkg_vhd: ../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/xloader_registers_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xloader_registers_pkg/.xloader_registers_pkg: \
work/wbgen2_pkg/.wbgen2_pkg
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader_vhd: ../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/xwb_xilinx_fpga_loader.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader: \
work/wishbone_pkg/.wishbone_pkg
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader_vhd: ../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader: \
work/wishbone_pkg/.wishbone_pkg \
work/gencores_pkg/.gencores_pkg \
work/xloader_registers_pkg/.xloader_registers_pkg
work/xloader_wb/.xloader_wb_vhd: ../../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/xloader_wb.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xloader_wb/.xloader_wb: \
work/wbgen2_pkg/.wbgen2_pkg \
work/xloader_registers_pkg/.xloader_registers_pkg
work/ddr3_ctrl/.ddr3_ctrl_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ddr3_ctrl_wb/.ddr3_ctrl_wb_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wb.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ddr3_ctrl_wb/.ddr3_ctrl_wb: \
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper: \
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg
work/xvme64x_core_pkg/.xvme64x_core_pkg_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/xvme64x_core_pkg.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xvme64x_core_pkg/.xvme64x_core_pkg: \
work/wishbone_pkg/.wishbone_pkg
work/ddr3_ctrl_svec_bank4_64b_32b/.ddr3_ctrl_svec_bank4_64b_32b_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/ddr3_ctrl_svec_bank4_64b_32b.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/memc4_infrastructure/.memc4_infrastructure_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/memc4_infrastructure.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/memc4_wrapper/.memc4_wrapper_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/memc4_wrapper.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/iodrp_controller/.iodrp_controller_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/iodrp_controller.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/iodrp_mcb_controller/.iodrp_mcb_controller_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/iodrp_mcb_controller.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/mcb_raw_wrapper/.mcb_raw_wrapper_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/mcb_raw_wrapper.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/mcb_soft_calibration_top/.mcb_soft_calibration_top_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/mcb_soft_calibration_top.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/mcb_soft_calibration/.mcb_soft_calibration_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/mcb_soft_calibration.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/ddr3_ctrl_svec_bank5_64b_32b/.ddr3_ctrl_svec_bank5_64b_32b_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/ddr3_ctrl_svec_bank5_64b_32b.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/memc5_infrastructure/.memc5_infrastructure_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/memc5_infrastructure.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/memc5_wrapper/.memc5_wrapper_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/memc5_wrapper.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/iodrp_controller/.iodrp_controller_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/iodrp_controller.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/iodrp_mcb_controller/.iodrp_mcb_controller_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/iodrp_mcb_controller.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/mcb_raw_wrapper/.mcb_raw_wrapper_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/mcb_raw_wrapper.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/mcb_soft_calibration_top/.mcb_soft_calibration_top_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/mcb_soft_calibration_top.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/mcb_soft_calibration/.mcb_soft_calibration_vhd: ../../../ip_cores/ddr3-sp6-core/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/mcb_soft_calibration.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/vme64x_pack/.vme64x_pack_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/vme64x_pack.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/svec_top_fmc_adc_100Ms/.svec_top_fmc_adc_100Ms_vhd: ../../rtl/svec_top_fmc_adc_100Ms.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/svec_top_fmc_adc_100Ms/.svec_top_fmc_adc_100Ms: \
work/wishbone_pkg/.wishbone_pkg \
work/timetag_core_pkg/.timetag_core_pkg \
work/xvme64x_core_pkg/.xvme64x_core_pkg \
work/fmc_adc_mezzanine_pkg/.fmc_adc_mezzanine_pkg \
work/bicolor_led_ctrl_pkg/.bicolor_led_ctrl_pkg \
work/sdb_meta_pkg/.sdb_meta_pkg \
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg \
work/gencores_pkg/.gencores_pkg
work/VME_CR_pack/.VME_CR_pack_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CR_pack.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_CR_pack/.VME_CR_pack: \
work/vme64x_pack/.vme64x_pack
work/xvme64x_core/.xvme64x_core_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/xvme64x_core.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/xvme64x_core/.xvme64x_core: \
work/vme64x_pack/.vme64x_pack \
work/wishbone_pkg/.wishbone_pkg
work/VME_Access_Decode/.VME_Access_Decode_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Access_Decode.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_Access_Decode/.VME_Access_Decode: \
work/vme64x_pack/.vme64x_pack
work/VME_Am_Match/.VME_Am_Match_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Am_Match.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_Am_Match/.VME_Am_Match: \
work/vme64x_pack/.vme64x_pack
work/VME_bus/.VME_bus_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_bus.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_bus/.VME_bus: \
work/vme64x_pack/.vme64x_pack
work/VME_CSR_pack/.VME_CSR_pack_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CSR_pack.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_CSR_pack/.VME_CSR_pack: \
work/vme64x_pack/.vme64x_pack
work/VME64xCore_Top/.VME64xCore_Top_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME64xCore_Top.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME64xCore_Top/.VME64xCore_Top: \
work/vme64x_pack/.vme64x_pack \
work/VME_CR_pack/.VME_CR_pack
work/VME_CR_CSR_Space/.VME_CR_CSR_Space_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CR_CSR_Space.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_CR_CSR_Space/.VME_CR_CSR_Space: \
work/VME_CSR_pack/.VME_CSR_pack \
work/vme64x_pack/.vme64x_pack \
work/VME_CR_pack/.VME_CR_pack
work/VME_CRAM/.VME_CRAM_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_CRAM.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_CRAM/.VME_CRAM: \
work/vme64x_pack/.vme64x_pack
work/VME_Funct_Match/.VME_Funct_Match_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Funct_Match.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_Funct_Match/.VME_Funct_Match: \
work/vme64x_pack/.vme64x_pack
work/VME_Init/.VME_Init_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Init.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_Init/.VME_Init: \
work/vme64x_pack/.vme64x_pack
work/VME_IRQ_Controller/.VME_IRQ_Controller_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_IRQ_Controller.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_IRQ_Controller/.VME_IRQ_Controller: \
work/vme64x_pack/.vme64x_pack
work/VME_SharedComps/.VME_SharedComps_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_SharedComps.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_swapper/.VME_swapper_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_swapper.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_Wb_master/.VME_Wb_master_vhd: ../../../ip_cores/vme64x-core/hdl/vme64x-core/rtl/VME_Wb_master.vhd
vcom $(VCOM_FLAGS) -work work $<
@mkdir -p $(dir $@) && touch $@
work/VME_Wb_master/.VME_Wb_master: \
work/vme64x_pack/.vme64x_pack
sim_tool="modelsim"
top_module="main"
action = "simulation"
target = "xilinx"
vlog_opt="+incdir+../vme64x_bfm +incdir+../2048Mb_ddr3"
syn_device = "xc6slx150t"
include_dirs=["../vme64x_bfm", "../2048Mb_ddr3", "../../../ip_cores/general-cores/sim"]
files = [ "main.sv",
"../../../ip_cores/adc_sync_fifo.vhd",
......@@ -21,3 +23,5 @@ modules = { "local" : [ "../../rtl",
"git://ohwr.org/hdl-core-lib/vme64x-core.git::master"]}
fetchto="../../../ip_cores"
ctrls = ["bank4_64b_32b", "bank5_64b_32b"]
......@@ -117,7 +117,9 @@ module main;
int i, result;
CBusAccessor_VME64x acc = new(VME.master);
CBusAccessor_VME64x acc;
acc = new(VME.master);
#20us;
......
vsim -novopt -t 1ps main
log -r /*
#log -r /*
set StdArithNoWarnings 1
set NumericStdNoWarnings 1
#view wave
#view transcript
#do wave_interrupt.do
do wave_ddr.do
do wave_interrupt.do
#do wave_ddr.do
#do wave.do
radix -hexadecimal
run 50 us
......
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