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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
Commits
555b7a24
Commit
555b7a24
authored
Nov 30, 2012
by
Matthieu Cattin
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spec_top_fmc_adc_100Ms.par
hdl/spec/syn/spec_top_fmc_adc_100Ms.par
+63
-63
spec_top_fmc_adc_100Ms.syr
hdl/spec/syn/spec_top_fmc_adc_100Ms.syr
+1469
-3209
spec_top_fmc_adc_100Ms.twr
hdl/spec/syn/spec_top_fmc_adc_100Ms.twr
+830
-1106
spec_top_fmc_adc_100Ms_map.mrp
hdl/spec/syn/spec_top_fmc_adc_100Ms_map.mrp
+26
-26
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hdl/spec/syn/spec_top_fmc_adc_100Ms.par
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hdl/spec/syn/spec_top_fmc_adc_100Ms_map.mrp
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555b7a24
...
...
@@ -11,23 +11,23 @@ Target Device : xc6slx45t
Target Package : fgg484
Target Speed : -3
Mapper Version : spartan6 -- $Revision: 1.55 $
Mapped Date : Fri
Aug 3 16:35:35
2012
Mapped Date : Fri
Nov 30 14:43:16
2012
Design Summary
--------------
Number of errors: 0
Number of warnings: 8
Slice Logic Utilization:
Number of Slice Registers: 6,
824
out of 54,576 12%
Number used as Flip Flops: 6,
824
Number of Slice Registers: 6,
576
out of 54,576 12%
Number used as Flip Flops: 6,
576
Number used as Latches: 0
Number used as Latch-thrus: 0
Number used as AND/OR logics: 0
Number of Slice LUTs: 5,4
60 out of 27,288 20
%
Number used as logic:
4,929
out of 27,288 18%
Number using O6 output only: 3,
10
9
Number using O5 output only:
279
Number using O5 and O6: 1,5
4
1
Number of Slice LUTs: 5,4
03 out of 27,288 19
%
Number used as logic:
5,150
out of 27,288 18%
Number using O6 output only: 3,
28
9
Number using O5 output only:
360
Number using O5 and O6: 1,5
0
1
Number used as ROM: 0
Number used as Memory: 2 out of 6,408 1%
Number used as Dual Port RAM: 0
...
...
@@ -36,21 +36,21 @@ Slice Logic Utilization:
Number using O6 output only: 2
Number using O5 output only: 0
Number using O5 and O6: 0
Number used exclusively as route-thrus:
529
Number with same-slice register load:
518
Number with same-slice carry load:
1
1
Number used exclusively as route-thrus:
251
Number with same-slice register load:
230
Number with same-slice carry load:
2
1
Number with other load: 0
Slice Logic Distribution:
Number of occupied Slices: 2,
365 out of 6,822 34
%
Nummber of MUXCYs used: 1,
42
4 out of 13,644 10%
Number of LUT Flip Flop pairs used: 7,
523
Number with an unused Flip Flop: 1,
673 out of 7,523 22
%
Number with an unused LUT: 2,
063 out of 7,523 27
%
Number of fully used LUT-FF pairs: 3,
787 out of 7,523 50
%
Number of unique control sets: 2
61
Number of occupied Slices: 2,
516 out of 6,822 36
%
Nummber of MUXCYs used: 1,
38
4 out of 13,644 10%
Number of LUT Flip Flop pairs used: 7,
794
Number with an unused Flip Flop: 1,
901 out of 7,794 24
%
Number with an unused LUT: 2,
391 out of 7,794 30
%
Number of fully used LUT-FF pairs: 3,
502 out of 7,794 44
%
Number of unique control sets: 2
35
Number of slice register sites lost
to control set restrictions:
686
out of 54,576 1%
to control set restrictions:
542
out of 54,576 1%
A LUT Flip Flop pair for this architecture represents one LUT paired with
one Flip Flop within a slice. A control set is a unique combination of
...
...
@@ -63,7 +63,7 @@ IO Utilization:
Number of LOCed IOBs: 188 out of 188 100%
Specific Feature Utilization:
Number of RAMB16BWERs: 6
7 out of 116 57
%
Number of RAMB16BWERs: 6
8 out of 116 58
%
Number of RAMB8BWERs: 2 out of 232 1%
Number of BUFIO2/BUFIO2_2CLKs: 3 out of 32 9%
Number used as BUFIO2s: 3
...
...
@@ -100,11 +100,11 @@ Specific Feature Utilization:
Number of STARTUPs: 0 out of 1 0%
Number of SUSPEND_SYNCs: 0 out of 1 0%
Average Fanout of Non-Clock Nets: 3.7
6
Average Fanout of Non-Clock Nets: 3.7
8
Peak Memory Usage: 41
3
MB
Total REAL time to MAP completion: 4 mins 4
8
secs
Total CPU time to MAP completion (all processors): 4 mins 5
0
secs
Peak Memory Usage: 41
5
MB
Total REAL time to MAP completion: 4 mins 4
9
secs
Total CPU time to MAP completion (all processors): 4 mins 5
3
secs
Table of Contents
-----------------
...
...
@@ -164,8 +164,8 @@ INFO:LIT:243 - Logical network
_infrastructure_inst/rst0_sync_r<24> has no load.
INFO:LIT:395 - The above info message is repeated 9 more times for the following
(max. 5 shown):
N6
48
,
N6
50
,
N6
86
,
N6
88
,
aux_buttons_i<1>_IBUF,
aux_buttons_i<0>_IBUF,
P_WR_REQ<1>_IBUF
...
...
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