Commit bd260e57 authored by Matthieu Cattin's avatar Matthieu Cattin

Use system reset for gn4124 core.

Was using the external reset (from gn4124 chip) only.
Now it uses the system reset taking into account the external reset
and the system clockpll lock status.
parent 21342386
......@@ -635,7 +635,7 @@ begin
cmp_gn4124_core : gn4124_core
port map(
rst_n_a_i => L_RST_N,
rst_n_a_i => sys_rst_n,
status_o => gn4124_status,
-- P2L Direction Source Sync DDR related signals
p2l_clk_p_i => P2L_CLKp,
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment