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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
Commits
ca9e3875
Commit
ca9e3875
authored
Apr 19, 2016
by
Dimitris Lampridis
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hdl: fixed identation and updated headers on all modified files, prior to new release
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1f69cf8c
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273 additions
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265 deletions
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-265
fmc_adc_100Ms_core.vhd
hdl/adc/rtl/fmc_adc_100Ms_core.vhd
+110
-108
spec_top_fmc_adc_100Ms.vhd
hdl/spec/rtl/spec_top_fmc_adc_100Ms.vhd
+86
-82
svec_top_fmc_adc_100Ms.vhd
hdl/svec/rtl/svec_top_fmc_adc_100Ms.vhd
+77
-75
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hdl/adc/rtl/fmc_adc_100Ms_core.vhd
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ca9e3875
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hdl/spec/rtl/spec_top_fmc_adc_100Ms.vhd
View file @
ca9e3875
--------------------------------------------------------------------------------
-- CERN (BE-CO-HT)
-- Top level entity for Simple PCIe FMC Carrier
-- http://www.ohwr.org/projects/spec
--------------------------------------------------------------------------------
--
-- unit name: spec_top_fmc_adc_100Ms (spec_top_fmc_adc_100Ms.vhd)
--
-- author: Matthieu Cattin (matthieu.cattin@cern.ch)
--
-- date: 24-02-2011
--
-- version: see sdb_meta_pkg.vhd
--
-- description: Top entity of FMC ADC 100Ms/s design for SPEC board.
--
-- dependencies:
--
--------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Title : FMC ADC 100Ms/s SPEC top-level
-- Project : FMC ADC 100M 14B 4CHA gateware
-- URL : http://www.ohwr.org/projects/fmc-adc-100m14b4cha-gw
-------------------------------------------------------------------------------
-- File : spec_top_fmc_adc_100Ms.vhd
-- Author(s) : Matthieu Cattin <matthieu.cattin@cern.ch>
-- : Dimitrios Lampridis <dimitrios.lampridis@cern.ch>
-- Company : CERN (BE-CO-HT)
-- Created : 2011-02-24
-- Last update: 2016-04-19
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description: Top entity of FMC ADC 100Ms/s design for Simple PCIe FMC
-- Carrier (SPEC). See also: http://www.ohwr.org/projects/spec
-------------------------------------------------------------------------------
-- Copyright (c) 2011-2016 CERN (BE-CO-HT)
-------------------------------------------------------------------------------
-- GNU LESSER GENERAL PUBLIC LICENSE
-------------------------------------------------------------------------------
-
-------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
...
...
@@ -28,11 +27,16 @@
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--------------------------------------------------------------------------------
-- last changes: see git log.
--------------------------------------------------------------------------------
-- TODO: -
--------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author
-- 2016-04-20 4.1 Dimitrios Lampridis
-- 2014-04-25 4.0 Matthieu Cattin
-- 2014-01-16 3.0 Matthieu Cattin
-- 2013-07-29 2.0 Matthieu Cattin
-- 2013-03-28 1.1 Matthieu Cattin
-- 2013-03-11 1.0 Matthieu Cattin
-------------------------------------------------------------------------------
library
IEEE
;
use
IEEE
.
STD_LOGIC_1164
.
all
;
...
...
@@ -522,8 +526,8 @@ begin
------------------------------------------------------------------------------
cmp_l_clk_buf
:
IBUFDS
generic
map
(
DIFF_TERM
=>
false
,
-- Differential Termination
IBUF_LOW_PWR
=>
true
,
-- Low power (TRUE) vs. performance (FALSE) setting for referenced I/O standards
DIFF_TERM
=>
FALSE
,
-- Differential Termination
IBUF_LOW_PWR
=>
TRUE
,
-- Low power (TRUE) vs. performance (FALSE) setting for referenced I/O standards
IOSTANDARD
=>
"DEFAULT"
)
port
map
(
O
=>
l_clk
,
-- Buffer output
...
...
@@ -653,8 +657,8 @@ begin
generic
map
(
g_num_masters
=>
c_NUM_WB_SLAVES
,
g_num_slaves
=>
c_NUM_WB_MASTERS
,
g_registered
=>
true
,
g_wraparound
=>
true
,
g_registered
=>
TRUE
,
g_wraparound
=>
TRUE
,
g_layout
=>
c_INTERCONNECT_LAYOUT
,
g_sdb_addr
=>
c_SDB_ADDRESS
)
port
map
(
...
...
hdl/svec/rtl/svec_top_fmc_adc_100Ms.vhd
View file @
ca9e3875
--------------------------------------------------------------------------------
-- CERN (BE-CO-HT)
-- Top level entity for Simple VME FMC Carrier
-- http://www.ohwr.org/projects/svec
--------------------------------------------------------------------------------
--
-- unit name: svec_top_fmc_adc_100Ms (svec_top_fmc_adc_100Ms.vhd)
--
-- author: Matthieu Cattin (matthieu.cattin@cern.ch)
--
-- date: 04-07-2013
--
-- version: see sdb_meta_pkg.vhd
--
-- description: Top entity of FMC ADC 100Ms/s design for SVEC board.
--
-- dependencies:
--
--------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Title : FMC ADC 100Ms/s SVEC top-level
-- Project : FMC ADC 100M 14B 4CHA gateware
-- URL : http://www.ohwr.org/projects/fmc-adc-100m14b4cha-gw
-------------------------------------------------------------------------------
-- File : svec_top_fmc_adc_100Ms.vhd
-- Author(s) : Matthieu Cattin <matthieu.cattin@cern.ch>
-- : Dimitrios Lampridis <dimitrios.lampridis@cern.ch>
-- Company : CERN (BE-CO-HT)
-- Created : 2013-07-04
-- Last update: 2016-04-19
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description: Top entity of FMC ADC 100Ms/s design for Simple VME FMC
-- Carrier (SVEC). See also: http://www.ohwr.org/projects/svec
-------------------------------------------------------------------------------
-- Copyright (c) 2013-2016 CERN (BE-CO-HT)
-------------------------------------------------------------------------------
-- GNU LESSER GENERAL PUBLIC LICENSE
-------------------------------------------------------------------------------
-
-------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
...
...
@@ -28,11 +27,14 @@
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--------------------------------------------------------------------------------
-- last changes: see git log.
--------------------------------------------------------------------------------
-- TODO: -
--------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author
-- 2016-04-20 4.1 Dimitrios Lampridis
-- 2014-04-25 4.0 Matthieu Cattin
-- 2014-01-16 3.0 Matthieu Cattin
-- 2013-07-29 1.0 Matthieu Cattin
-------------------------------------------------------------------------------
library
IEEE
;
use
IEEE
.
STD_LOGIC_1164
.
all
;
...
...
@@ -775,8 +777,8 @@ begin
generic
map
(
g_num_masters
=>
c_NUM_WB_SLAVES
,
g_num_slaves
=>
c_NUM_WB_MASTERS
,
g_registered
=>
true
,
g_wraparound
=>
true
,
g_registered
=>
TRUE
,
g_wraparound
=>
TRUE
,
g_layout
=>
c_INTERCONNECT_LAYOUT
,
g_sdb_addr
=>
c_SDB_ADDRESS
)
port
map
(
...
...
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