Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
F
FMC ADC 100M 14b 4cha - Gateware
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
8
Issues
8
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
FMC ADC 100M 14b 4cha - Gateware
Commits
eb67f948
Commit
eb67f948
authored
Mar 08, 2013
by
Matthieu Cattin
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
hdl: Change fifo and dpram from adc core to general-cores.
Was using custom coregen fifo and dpram.
parent
16d17ea6
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
170 additions
and
100 deletions
+170
-100
fmc_adc_100Ms_core.vhd
hdl/adc/rtl/fmc_adc_100Ms_core.vhd
+162
-98
fmc_adc_100Ms_core_pkg.vhd
hdl/adc/rtl/fmc_adc_100Ms_core_pkg.vhd
+5
-2
spec_top_fmc_adc_100Ms.vhd
hdl/spec/rtl/spec_top_fmc_adc_100Ms.vhd
+3
-0
No files found.
hdl/adc/rtl/fmc_adc_100Ms_core.vhd
View file @
eb67f948
This diff is collapsed.
Click to expand it.
hdl/adc/rtl/fmc_adc_100Ms_core_pkg.vhd
View file @
eb67f948
...
@@ -43,12 +43,15 @@ package fmc_adc_100Ms_core_pkg is
...
@@ -43,12 +43,15 @@ package fmc_adc_100Ms_core_pkg is
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Constants declaration
-- Constants declaration
------------------------------------------------------------------------------
------------------------------------------------------------------------------
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Components declaration
-- Components declaration
------------------------------------------------------------------------------
------------------------------------------------------------------------------
component
fmc_adc_100Ms_core
component
fmc_adc_100Ms_core
generic
(
g_multishot_ram_size
:
natural
:
=
2048
);
port
(
port
(
-- Clock, reset
-- Clock, reset
sys_clk_i
:
in
std_logic
;
sys_clk_i
:
in
std_logic
;
...
@@ -109,6 +112,6 @@ end fmc_adc_100Ms_core_pkg;
...
@@ -109,6 +112,6 @@ end fmc_adc_100Ms_core_pkg;
package
body
fmc_adc_100Ms_core_pkg
is
package
body
fmc_adc_100Ms_core_pkg
is
end
fmc_adc_100Ms_core_pkg
;
end
fmc_adc_100Ms_core_pkg
;
hdl/spec/rtl/spec_top_fmc_adc_100Ms.vhd
View file @
eb67f948
...
@@ -1051,6 +1051,9 @@ begin
...
@@ -1051,6 +1051,9 @@ begin
-- ADC core control and status
-- ADC core control and status
------------------------------------------------------------------------------
------------------------------------------------------------------------------
cmp_fmc_adc_100Ms_core
:
fmc_adc_100Ms_core
cmp_fmc_adc_100Ms_core
:
fmc_adc_100Ms_core
generic
map
(
g_multishot_ram_size
=>
2048
)
port
map
(
port
map
(
sys_clk_i
=>
sys_clk_125
,
sys_clk_i
=>
sys_clk_125
,
sys_rst_n_i
=>
sys_rst_n
,
sys_rst_n_i
=>
sys_rst_n
,
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment