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    • Dimitris Lampridis's avatar
      hdl: complete rework of trigger logic and SPEC testbench update. · 6f31510f
      Dimitris Lampridis authored
      The new trigger logic allows for logical OR'ing of all trigger sources, by means
      of the new "trigger enable" register. For each trigger the "mask" of the trigger source(s)
      is reflected in the "trigger status" register and it is also stored in the data stream
      together with the trigger time tag.
      
      Furthermore, the previously used glitch filter has been removed, in favor of a comparator module
      with optional hysteresis. This approach makes the internal trigger logic more responsible,
      versatile and intuitive to the user.
      
      The SPEC testbench has been updated to test these new features. It is still far from perfect though,
      see also issue #1726.
      6f31510f
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