FPGA Resource Utilization (SVEC)
FMC ADC release 4.1 (no WR), Xilinx ISE 14.7
Resource | * Used * | * Available * | * Utilization * |
---|---|---|---|
Occupied Slices | 4605 | 23038 | 19% |
Slice LUTs | 11684 | 92152 | 12% |
Slice Registers | 9482 | 184304 | 5% |
MUXCY | 2856 | 46076 | 6% |
IOB | 356 | 540 | 65% |
RAMB16BWER | 138 | 268 | 51% |
RAMB8BWER | 8 | 536 | 1% |
BUFIO2 | 3 | 32 | 9% |
BUFIO2FB | 2 | 32 | 6% |
BUFG/BUFGMUX | 7 | 16 | 43% |
ILOGIC2/ISERDES2 | 36 | 586 | 6% |
IODELAY2/IODRP2/IODRP2_MCB | 46 | 586 | 7% |
OLOGIC2/OSERDES2 | 94 | 586 | 16% |
BUFPLL | 2 | 8 | 25% |
BUFPLL_MCB | 2 | 4 | 50% |
DSP48A1 | 8 | 180 | 4% |
MCB | 2 | 4 | 50% |
PLL_ADV | 5 | 6 | 83% |
note:* increase in on-chip RAM due to implementation of Feature #1266
FMC ADC release 4.0 (no WR), Xilinx ISE 14.7
Resource | * Used * | * Available * | * Utilization * |
---|---|---|---|
Occupied Slices | 4747 | 23038 | 20% |
Slice LUTs | 11664 | 92152 | 12% |
Slice Registers | 9478 | 184304 | 5% |
MUXCY | 2760 | 46076 | 5% |
IOB | 356 | 540 | 65% |
RAMB16BWER | 38 | 268 | 14% |
RAMB8BWER | 12 | 536 | 2% |
BUFIO2 | 3 | 32 | 9% |
BUFIO2FB | 2 | 32 | 6% |
BUFG/BUFGMUX | 7 | 16 | 43% |
ILOGIC2/ISERDES2 | 36 | 586 | 6% |
IODELAY2/IODRP2/IODRP2_MCB | 46 | 586 | 7% |
OLOGIC2/OSERDES2 | 94 | 586 | 16% |
BUFPLL | 2 | 8 | 25% |
BUFPLL_MCB | 2 | 4 | 50% |
DSP48A1 | 8 | 180 | 4% |
MCB | 2 | 4 | 50% |
PLL_ADV | 5 | 6 | 83% |
Dimitris Lampridis - April 2016