Memory map for svec-fmc-adc-v4.0
| | |* SDB version, offset (bytes) *|Description|Peripherals|Internal mapping|Status| |0x00000|SDB header|SDB specification|-|Available| |0x01000|Carrier I2C master|0x51) EEPROM 24AA64T|Registers|Available| |0x01100|Carrier 1-wire master|Thermometer + unique ID DS18B20|Registers|Available| |0x01200|Carrier CSR|PLL, DDR status, LED control, etc...|Registers|Available| |0x01300|VIC|Vectored Interrupt Controller|Registers|Available| |0x02000|FMC slot 1 Bridge SDB header|SDB specification|-|Available| |0x03000|FMC slot 1 Mezzanine system management I2C master|0x50) EEPROM (FMC standard) 24AA64T|Registers|Available| |0x03100|FMC slot 1 Mezzanine SPI master|0) ADC LTC2174, 1->4) DAC (for DC offset) MAX5442|Registers|Available| |0x03200|FMC slot 1 Mezzanine I2C master|0x55) Oscillator (sampling clock) Si570|Registers|Available| |0x03300|FMC slot 1 Mezzanine ADC core CSR|ACQ state machine, input range, trigger, etc...|Registers|Available| |0x03400|FMC slot 1 Mezzanine 1-wire master|Thermometer + unique ID DS18B20|Registers|Available| |0x03500|FMC slot 1 Mezzanine EIC|Embedded Interrupt Controller for fmc-adc interrupts|Registers|Available| |0x03600|FMC slot 1 Time-tag core|Trigger, acq time-tags|Registers|Available| |0x04000|FMC slot 1 DDR address|DDR address counter, auto-incremented when accessing 'DDR data'|N/A|Available| |0x05000|FMC slot 1 DDR data|DDR data 'FIFO' register|N/A|Available| |0x06000|FMC slot 2 Bridge SDB header|SDB specification|-|Available| |0x07000|FMC slot 2 Mezzanine system management I2C master|0x50) EEPROM (FMC standard) 24AA64T|Registers|Available| |0x07100|FMC slot 2 Mezzanine SPI master|0) ADC LTC2174, 1->4) DAC (for DC offset) MAX5442|Registers|Available| |0x07200|FMC slot 2 Mezzanine I2C master|0x55) Oscillator (sampling clock) Si570|Registers|Available| |0x07300|FMC slot 2 Mezzanine ADC core CSR|ACQ state machine, input range, trigger, etc...|Registers|Available| |0x07400|FMC slot 2 Mezzanine 1-wire master|Thermometer + unique ID DS18B20|Registers|Available| |0x03500|FMC slot 2 Mezzanine EIC|Embedded Interrupt Controller for fmc-adc interrupts|Registers|Available| |0x07600|FMC slot 2 Time-tag core|Trigger, acq time-tags|Registers|Available| |0x08000|FMC slot 2 DDR address|DDR address counter, auto-incremented when accessing 'DDR data'|N/A|Available| |0x09000|FMC slot 2 DDR data|DDR data 'FIFO' register|N/A|Available|