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FMC ADC 100M 14b 4cha - Software
Commit 3adf48c7 authored by Federico Vaga's avatar Federico Vaga
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header: rename enum with specific names for adc 100m14b4cha 

In this way, can be reused in user space without overlapping with other
fmc adc
Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 8455f70d
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Showing with 102 additions and 104 deletions
kernel/fa-core.c
View file @ 3adf48c7
......@@ -33,10 +33,10 @@ static int fa_internal_trig_test = 0;
module_param_named(internal_trig_test, fa_internal_trig_test, int, 0444);
static const int zfad_hw_range[] = {
[ZFA_RANGE_10V] = 0x45,
[ZFA_RANGE_1V] = 0x11,
[ZFA_RANGE_100mV] = 0x23,
[ZFA_RANGE_OPEN] = 0x00,
[FA100M14B4C_RANGE_10V] = 0x45,
[FA100M14B4C_RANGE_1V] = 0x11,
[FA100M14B4C_RANGE_100mV] = 0x23,
[FA100M14B4C_RANGE_OPEN] = 0x00,
};
/* fmc-adc specific workqueue */
......@@ -63,7 +63,7 @@ int zfad_get_chx_index(unsigned long addr, struct zio_channel *chan)
{
int offset;
offset = ZFA_CHx_MULT * (FA_NCHAN - chan->index);
offset = ZFA_CHx_MULT * (FA100M14B4C_NCHAN - chan->index);
return addr - offset;
}
......@@ -95,7 +95,7 @@ int zfad_apply_user_offset(struct fa_dev *fa, struct zio_channel *chan,
if (range < 0)
return range;
if (range == ZFA_RANGE_OPEN) {
if (range == FA100M14B4C_RANGE_OPEN) {
offset = FA_CAL_NO_OFFSET;
gain = FA_CAL_NO_GAIN;
} else {
......@@ -128,7 +128,7 @@ void zfad_reset_offset(struct fa_dev *fa)
{
int i;
for (i = 0; i < FA_NCHAN; ++i)
for (i = 0; i < FA100M14B4C_NCHAN; ++i)
zfad_apply_user_offset(fa, &fa->zdev->cset->chan[i], 0);
}
......@@ -142,7 +142,7 @@ void zfad_init_saturation(struct fa_dev *fa)
{
int idx, i;
for (i = 0, idx = ZFA_CH1_SAT; i < FA_NCHAN; ++i, idx += ZFA_CHx_MULT)
for (i = 0, idx = ZFA_CH1_SAT; i < FA100M14B4C_NCHAN; ++i, idx += ZFA_CHx_MULT)
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[idx], 0x7fff);
}
......@@ -163,7 +163,7 @@ int zfad_set_range(struct fa_dev *fa, struct zio_channel *chan,
i = zfad_get_chx_index(ZFA_CHx_CTL_RANGE, chan);
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[i], zfad_hw_range[range]);
if (range == ZFA_RANGE_OPEN) {
if (range == FA100M14B4C_RANGE_OPEN) {
offset = FA_CAL_NO_OFFSET;
gain = FA_CAL_NO_GAIN;
} else {
......@@ -202,7 +202,7 @@ int zfad_fsm_command(struct fa_dev *fa, uint32_t command)
struct zio_cset *cset = fa->zdev->cset;
uint32_t val;
if (command != ZFA_START && command != ZFA_STOP) {
if (command != FA100M14B4C_CMD_START && command != FA100M14B4C_CMD_STOP) {
dev_info(dev, "Invalid command %i\n", command);
return -EINVAL;
}
......@@ -221,7 +221,7 @@ int zfad_fsm_command(struct fa_dev *fa, uint32_t command)
* The case of fmc-adc-trg is optimized because is the most common
* case
*/
if (likely(cset->trig == &zfat_type || command == ZFA_STOP))
if (likely(cset->trig == &zfat_type || command == FA100M14B4C_CMD_STOP))
zio_trigger_abort_disable(cset, 0);
/* Reset counters */
......@@ -229,7 +229,7 @@ int zfad_fsm_command(struct fa_dev *fa, uint32_t command)
fa->n_fires = 0;
/* If START, check if we can start */
if (command == ZFA_START) {
if (command == FA100M14B4C_CMD_START) {
/* Verify that SerDes PLL is lockes */
val = fa_readl(fa, fa->fa_adc_csr_base,
&zfad_regs[ZFA_STA_SERDES_PLL]);
......@@ -338,14 +338,14 @@ static int __fa_init(struct fa_dev *fa)
/* Force stop FSM to prevent early trigger fire */
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFA_CTL_FMS_CMD],
ZFA_STOP);
FA100M14B4C_CMD_STOP);
/* Initialize channels to use 1V range */
for (i = 0; i < 4; ++i) {
addr = zfad_get_chx_index(ZFA_CHx_CTL_RANGE,
&zdev->cset->chan[i]);
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[addr],
ZFA_RANGE_1V);
zfad_set_range(fa, &zdev->cset->chan[i], ZFA_RANGE_1V);
FA100M14B4C_RANGE_1V);
zfad_set_range(fa, &zdev->cset->chan[i], FA100M14B4C_RANGE_1V);
}
zfad_reset_offset(fa);
......@@ -366,7 +366,7 @@ static int __fa_init(struct fa_dev *fa)
/* Select external trigger (index 0) */
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_CFG_HW_SEL],
1);
zdev->cset->ti->zattr_set.ext_zattr[ZFAT_ATTR_EXT].value = 1;
zdev->cset->ti->zattr_set.ext_zattr[FA100M14B4C_TATTR_EXT].value = 1;
} else {
/* Enable Software trigger*/
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_CFG_SW_EN],
......
kernel/fa-irq.c
View file @ 3adf48c7
......@@ -38,13 +38,13 @@ int zfad_dma_start(struct zio_cset *cset)
* If the state machine is _idle_ we can start the DMA transfer.
* If the state machine it is not idle, try again 5 times
*/
while (try-- && val != ZFA_STATE_IDLE) {
while (try-- && val != FA100M14B4C_STATE_IDLE) {
/* udelay(2); */
val = fa_readl(fa, fa->fa_adc_csr_base,
&zfad_regs[ZFA_STA_FSM]);
}
if (val != ZFA_STATE_IDLE) {
if (val != FA100M14B4C_STATE_IDLE) {
/* we can't DMA if the state machine is not idle */
dev_warn(&fa->fmc->dev,
"Can't start DMA on the last acquisition, "
......@@ -61,8 +61,8 @@ int zfad_dma_start(struct zio_cset *cset)
/* Fix dev_mem_addr in single-shot mode */
if (fa->n_shots == 1) {
int nchan = FA_NCHAN;
struct zio_control *ctrl = cset->chan[FA_NCHAN].current_ctrl;
int nchan = FA100M14B4C_NCHAN;
struct zio_control *ctrl = cset->chan[FA100M14B4C_NCHAN].current_ctrl;
/* get pre-samples from the current control (interleave chan) */
pre_samp = ctrl->attr_trigger.std_val[ZIO_ATTR_TRIG_PRE_SAMP];
......@@ -136,16 +136,16 @@ void zfad_dma_done(struct zio_cset *cset)
ctrl->tstamp.bins = *(++trig_timetag);
/* Acquisition start Timetag */
ctrl->attr_channel.ext_val[ZFAD_ATTR_ACQ_START_S] = ztstamp.secs;
ctrl->attr_channel.ext_val[ZFAD_ATTR_ACQ_START_C] = ztstamp.ticks;
ctrl->attr_channel.ext_val[ZFAD_ATTR_ACQ_START_F] = ztstamp.bins;
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_S] = ztstamp.secs;
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_C] = ztstamp.ticks;
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_F] = ztstamp.bins;
/*
* resize the datalen, by removing the trigger tstamp and the
* extra samples (trigger samples, 1 for each channel)
*/
block->datalen = block->datalen - FA_TRIG_TIMETAG_BYTES
- (ctrl->ssize * FA_NCHAN);
- (ctrl->ssize * FA100M14B4C_NCHAN);
/* update seq num */
ctrl->seq_num = i;
......@@ -196,7 +196,7 @@ void zfad_dma_error(struct zio_cset *cset)
fa->carrier_op->dma_error(cset);
zfad_fsm_command(fa, ZFA_STOP);
zfad_fsm_command(fa, FA100M14B4C_CMD_STOP);
fa->n_dma_err++;
if (fa->n_fires == 0)
......@@ -292,7 +292,7 @@ static void fa_irq_work(struct work_struct *work)
} else if (fa->enable_auto_start) {
/* Automatic start next acquisition */
dev_dbg(&fa->fmc->dev, "Automatic start\n");
zfad_fsm_command(fa, ZFA_START);
zfad_fsm_command(fa, FA100M14B4C_CMD_START);
}
end:
......
kernel/fa-spec-irq.c
View file @ 3adf48c7
......@@ -71,7 +71,7 @@ irqreturn_t fa_spec_irq_handler(int irq_core_base, void *ptr)
"The ADC doesn't behave properly\n",
(irq_core_base == fa->fa_irq_adc_base) ? "ACQ" : "DMA");
/* Stop Acquisition, ADC it is not working properly */
zfad_fsm_command(fa, ZFA_STOP);
zfad_fsm_command(fa, FA100M14B4C_CMD_STOP);
fa->last_irq_core_src = FA_SPEC_IRQ_SRC_NONE;
return IRQ_HANDLED;
}
......
kernel/fa-zio-drv.c
View file @ 3adf48c7
......@@ -171,7 +171,7 @@ static int zfad_conf_set(struct device *dev, struct zio_attribute *zattr,
int i, range, err, reg_index;
reg_index = zattr->id;
i = FA_NCHAN;
i = FA100M14B4C_NCHAN;
if (zattr->id >= ZFA_UTC_SECONDS && zattr->id <= ZFA_UTC_ACQ_END_FINE)
baseoff = fa->fa_utc_base;
......@@ -252,10 +252,10 @@ static int zfad_conf_set(struct device *dev, struct zio_attribute *zattr,
reg_index = zfad_get_chx_index(reg_index, to_zio_chan(dev));
break;
case ZFA_UTC_COARSE:
if (usr_val >= FA_UTC_CLOCK_FREQ) {
if (usr_val >= FA100M14B4C_UTC_CLOCK_FREQ) {
dev_err(dev,
"ticks time must be in the range [0, %d]\n",
FA_UTC_CLOCK_FREQ);
FA100M14B4C_UTC_CLOCK_FREQ);
return -EINVAL;
}
break;
......@@ -279,7 +279,7 @@ static int zfad_info_get(struct device *dev, struct zio_attribute *zattr,
unsigned int baseoff = fa->fa_adc_csr_base;
int i, reg_index;
i = FA_NCHAN;
i = FA100M14B4C_NCHAN;
if (zattr->id >= ZFA_UTC_SECONDS && zattr->id <= ZFA_UTC_ACQ_END_FINE)
baseoff = fa->fa_utc_base;
......@@ -370,7 +370,7 @@ static int zfad_input_cset_software(struct fa_dev *fa, struct zio_cset *cset)
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_POST],
cset->ti->nsamples);
/* Start the acquisition */
zfad_fsm_command(fa, ZFA_START);
zfad_fsm_command(fa, FA100M14B4C_CMD_START);
fa->n_shots = 1;
/* Fire software trigger */
......@@ -422,7 +422,7 @@ static void zfad_stop_cset(struct zio_cset *cset)
/* If the user is using a software trigger */
if (cset->trig != &zfat_type) {
/* Force the acquisition to stop */
zfad_fsm_command(fa, ZFA_STOP);
zfad_fsm_command(fa, FA100M14B4C_CMD_STOP);
/* Release zfad_block */
kfree(cset->interleave->priv_d);
cset->interleave->priv_d = NULL;
......@@ -476,7 +476,7 @@ static struct zio_cset zfad_cset[] = {
.raw_io = zfad_input_cset,
.stop_io = zfad_stop_cset,
.ssize = 2,
.n_chan = FA_NCHAN,
.n_chan = FA100M14B4C_NCHAN,
.chan_template = &zfad_chan_tmpl,
.flags = ZIO_CSET_TYPE_ANALOG | /* is analog */
ZIO_DIR_INPUT | /* is input */
......
kernel/fa-zio-trg.c
View file @ 3adf48c7
......@@ -44,38 +44,38 @@ static struct zio_attribute zfat_ext_zattr[] = {
* 0: internal (data threshold)
* 1: external (front panel trigger input)
*/
[ZFAT_ATTR_EXT] = ZIO_ATTR_EXT("external", ZIO_RW_PERM, ZFAT_CFG_HW_SEL, 0),
[FA100M14B4C_TATTR_EXT] = ZIO_ATTR_EXT("external", ZIO_RW_PERM, ZFAT_CFG_HW_SEL, 0),
/*
* Internal Hardware trigger polarity
* 0: positive edge/slope
* 1: negative edge/slope
*/
[ZFAT_ATTR_POL] = ZIO_ATTR_EXT("polarity", ZIO_RW_PERM, ZFAT_CFG_HW_POL, 0),
[FA100M14B4C_TATTR_POL] = ZIO_ATTR_EXT("polarity", ZIO_RW_PERM, ZFAT_CFG_HW_POL, 0),
/*
* Channel selection for internal trigger
* 0: channel 1, 1: channel 2, 2: channel 3, 3: channel 4
*/
[ZFAT_ATTR_INT_CHAN] = ZIO_ATTR_EXT("int-channel", ZIO_RW_PERM, ZFAT_CFG_INT_SEL, 0),
[FA100M14B4C_TATTR_INT_CHAN] = ZIO_ATTR_EXT("int-channel", ZIO_RW_PERM, ZFAT_CFG_INT_SEL, 0),
/* Internal trigger threshold value is 2 complement format */
[ZFAT_ATTR_INT_THRES] = ZIO_ATTR_EXT("int-threshold", ZIO_RW_PERM, ZFAT_CFG_THRES, 0),
[FA100M14B4C_TATTR_INT_THRES] = ZIO_ATTR_EXT("int-threshold", ZIO_RW_PERM, ZFAT_CFG_THRES, 0),
/*
* Delay to apply on the trigger in sampling clock period. The default
* clock frequency is 100MHz (period = 10ns)
*/
[ZFAT_ATTR_DELAY] = ZIO_ATTR_EXT("delay", ZIO_RW_PERM, ZFAT_DLY, 0),
[FA100M14B4C_TATTR_DELAY] = ZIO_ATTR_EXT("delay", ZIO_RW_PERM, ZFAT_DLY, 0),
/* setup the maximum glith length to filter */
ZIO_ATTR_EXT("int-threshold-filter", ZIO_RW_PERM, ZFAT_CFG_THRES_FILT,
0),
/* Software Trigger */
/* Enable (1) or disable (0) software trigger */
[ZFAT_ATTR_SW_EN] = ZIO_PARAM_EXT("sw-trg-enable", ZIO_RW_PERM, ZFAT_CFG_SW_EN, 0),
[ZFAT_ATTR_SW_FIRE] = ZIO_PARAM_EXT("sw-trg-fire", ZIO_WO_PERM, ZFAT_SW, 0),
[FA100M14B4C_TATTR_SW_EN] = ZIO_PARAM_EXT("sw-trg-enable", ZIO_RW_PERM, ZFAT_CFG_SW_EN, 0),
[FA100M14B4C_TATTR_SW_FIRE] = ZIO_PARAM_EXT("sw-trg-fire", ZIO_WO_PERM, ZFAT_SW, 0),
/* last trigger time stamp */
[ZFAT_ATTR_TRG_S] = ZIO_PARAM_EXT("tstamp-trg-lst-s", ZIO_RO_PERM, ZFA_UTC_TRIG_SECONDS, 0),
[ZFAT_ATTR_TRG_C] = ZIO_PARAM_EXT("tstamp-trg-lst-t", ZIO_RO_PERM, ZFA_UTC_TRIG_COARSE, 0),
[ZFAT_ATTR_TRG_F] = ZIO_PARAM_EXT("tstamp-trg-lst-b", ZIO_RO_PERM, ZFA_UTC_TRIG_FINE, 0),
[FA100M14B4C_TATTR_TRG_S] = ZIO_PARAM_EXT("tstamp-trg-lst-s", ZIO_RO_PERM, ZFA_UTC_TRIG_SECONDS, 0),
[FA100M14B4C_TATTR_TRG_C] = ZIO_PARAM_EXT("tstamp-trg-lst-t", ZIO_RO_PERM, ZFA_UTC_TRIG_COARSE, 0),
[FA100M14B4C_TATTR_TRG_F] = ZIO_PARAM_EXT("tstamp-trg-lst-b", ZIO_RO_PERM, ZFA_UTC_TRIG_FINE, 0),
};
......@@ -106,7 +106,7 @@ static int zfat_conf_set(struct device *dev, struct zio_attribute *zattr,
break;
case ZFAT_SW:
/* Fire if software trigger is enabled (index 5) */
if (!ti->zattr_set.ext_zattr[ZFAT_ATTR_SW_EN].value) {
if (!ti->zattr_set.ext_zattr[FA100M14B4C_TATTR_SW_EN].value) {
dev_info(dev, "sw trigger is not enabled\n");
return -EPERM;
}
......@@ -319,7 +319,7 @@ static int zfat_arm_trigger(struct zio_ti *ti)
* +FA_NCHAN because of the trigger samples (1 for each channel) which
* will discard later on DMA done
*/
size = (interleave->current_ctrl->ssize * (ti->nsamples + FA_NCHAN))
size = (interleave->current_ctrl->ssize * (ti->nsamples + FA100M14B4C_NCHAN))
+ FA_TRIG_TIMETAG_BYTES;
/* check if size is 32 bits word aligned: should be always the case */
if (size % 4) {
......
kernel/fmc-adc-100m14b4cha.h
View file @ 3adf48c7
......@@ -11,7 +11,7 @@
/*
* Trigger Extended Attribute Enumeration
*/
enum fa_trig_ext_attributes {
enum fa100m14b4c_trg_ext_attr {
/*
* The trigger extended attribute order is the same in the declaration
* and in the zio_control, so we can always use enumeration. But, the
......@@ -20,77 +20,75 @@ enum fa_trig_ext_attributes {
* The parameters are not exposed to user space by zio_controle, so it
* is not necessary to export to user space the correspondent enum
*/
ZFAT_ATTR_EXT = 0,
ZFAT_ATTR_POL,
ZFAT_ATTR_INT_CHAN,
ZFAT_ATTR_INT_THRES,
ZFAT_ATTR_DELAY,
FA100M14B4C_TATTR_EXT = 0,
FA100M14B4C_TATTR_POL,
FA100M14B4C_TATTR_INT_CHAN,
FA100M14B4C_TATTR_INT_THRES,
FA100M14B4C_TATTR_DELAY,
#ifdef __KERNEL__
ZFAT_ATTR_SW_EN,
ZFAT_ATTR_SW_FIRE,
ZFAT_ATTR_TRG_S,
ZFAT_ATTR_TRG_C,
ZFAT_ATTR_TRG_F,
FA100M14B4C_TATTR_SW_EN,
FA100M14B4C_TATTR_SW_FIRE,
FA100M14B4C_TATTR_TRG_S,
FA100M14B4C_TATTR_TRG_C,
FA100M14B4C_TATTR_TRG_F,
#endif
};
/*
* Device Extended Attribute Enumeration
*/
enum fa_dev_ext_attributes {
enum fa100m14b4c_dev_ext_attr {
/*
* NOTE: At the moment the only extended attributes we have in
* the device hierarchy are in the cset level, so we can safely
* start from index 0
*/
ZFAD_ATTR_DECI = 0,
ZFAD_ATTR_CH0_OFFSET,
ZFAD_ATTR_CH1_OFFSET,
ZFAD_ATTR_CH2_OFFSET,
ZFAD_ATTR_CH3_OFFSET,
ZFAD_ATTR_CH0_VREF,
ZFAD_ATTR_CH1_VREF,
ZFAD_ATTR_CH2_VREF,
ZFAD_ATTR_CH3_VREF,
ZFAD_ATTR_CH0_50TERM,
ZFAD_ATTR_CH1_50TERM,
ZFAD_ATTR_CH2_50TERM,
ZFAD_ATTR_CH3_50TERM,
ZFAD_ATTR_ACQ_START_S,
ZFAD_ATTR_ACQ_START_C,
ZFAD_ATTR_ACQ_START_F,
ZFAD_ATTR_BASE_S,
ZFAD_ATTR_BASE_C,
FA100M14B4C_DATTR_DECI = 0,
FA100M14B4C_DATTR_CH0_OFFSET,
FA100M14B4C_DATTR_CH1_OFFSET,
FA100M14B4C_DATTR_CH2_OFFSET,
FA100M14B4C_DATTR_CH3_OFFSET,
FA100M14B4C_DATTR_CH0_VREF,
FA100M14B4C_DATTR_CH1_VREF,
FA100M14B4C_DATTR_CH2_VREF,
FA100M14B4C_DATTR_CH3_VREF,
FA100M14B4C_DATTR_CH0_50TERM,
FA100M14B4C_DATTR_CH1_50TERM,
FA100M14B4C_DATTR_CH2_50TERM,
FA100M14B4C_DATTR_CH3_50TERM,
FA100M14B4C_DATTR_ACQ_START_S,
FA100M14B4C_DATTR_ACQ_START_C,
FA100M14B4C_DATTR_ACQ_START_F,
};
#define FA_UTC_CLOCK_FREQ 125000000
#define FA_UTC_CLOCK_NS 8
#define FA_NCHAN 4 /* We have 4 of them,no way out of it */
#define FA100M14B4C_UTC_CLOCK_FREQ 125000000
#define FA100M14B4C_UTC_CLOCK_NS 8
#define FA100M14B4C_NCHAN 4 /* We have 4 of them,no way out of it */
/* ADC DDR memory */
#define FA_MAX_ACQ_BYTE 0x10000000 /* 256MB */
#define FA100M14B4C_MAX_ACQ_BYTE 0x10000000 /* 256MB */
/* In Multi shot mode samples go through a dpram which has a limited size */
#define FA_MAX_MSHOT_ACQ_BYTE 0x3FE8 /* 2045 samples (2045*8 bytes) */
#define FA100M14B4C_MAX_MSHOT_ACQ_BYTE 0x3FE8 /* 2045 samples (2045*8 bytes) */
enum fa_input_range {
ZFA_RANGE_10V = 0x0,
ZFA_RANGE_1V,
ZFA_RANGE_100mV,
ZFA_RANGE_OPEN, /* Channel disconnected from ADC */
enum fa100m14b4c_input_range {
FA100M14B4C_RANGE_10V = 0x0,
FA100M14B4C_RANGE_1V,
FA100M14B4C_RANGE_100mV,
FA100M14B4C_RANGE_OPEN, /* Channel disconnected from ADC */
};
enum zfa_fsm_cmd {
ZFA_NONE = 0x0,
ZFA_START = 0x1,
ZFA_STOP = 0x2,
enum fa100m14b4c_fsm_cmd {
FA100M14B4C_CMD_NONE = 0x0,
FA100M14B4C_CMD_START = 0x1,
FA100M14B4C_CMD_STOP = 0x2,
};
/* All possible state of the state machine, other values are invalid*/
enum zfa_fsm_state {
ZFA_STATE_IDLE = 0x1,
ZFA_STATE_PRE,
ZFA_STATE_POST,
ZFA_STATE_WAIT,
ZFA_STATE_DECR,
enum fa100m14b4c_fsm_state {
FA100M14B4C_STATE_IDLE = 0x1,
FA100M14B4C_STATE_PRE,
FA100M14B4C_STATE_POST,
FA100M14B4C_STATE_WAIT,
FA100M14B4C_STATE_DECR,
};
......@@ -420,14 +418,14 @@ static inline int zfat_overflow_detection(struct zio_ti *ti, unsigned int addr,
* +1 because of the trigger samples, which is not counted as
* post-sample by the ADC
*/
shot_size = ((pre_t + post_t + 1) * ti->cset->ssize) * FA_NCHAN;
if ( (shot_size * nshot_t) >= FA_MAX_ACQ_BYTE ) {
shot_size = ((pre_t + post_t + 1) * ti->cset->ssize) * FA100M14B4C_NCHAN;
if ( (shot_size * nshot_t) >= FA100M14B4C_MAX_ACQ_BYTE ) {
dev_err(&ti->head.dev, "Cannot acquire, dev memory overflow\n");
return -ENOMEM;
}
/* in case of multi shot, each shot cannot exceed the dpram size */
if ( (nshot_t > 1) &&
(shot_size >= FA_MAX_MSHOT_ACQ_BYTE) ) {
(shot_size >= FA100M14B4C_MAX_MSHOT_ACQ_BYTE) ) {
dev_err(&ti->head.dev, "Cannot acquire such amount of samples "
"(shot_size: %d pre-samp:%d post-samp:%d) in multi shot mode."
"dev memory overflow\n",
......
libtools/fald-acq.c
View file @ 3adf48c7
......@@ -696,8 +696,8 @@ int main(int argc, char *argv[])
/* FIXME adc-lib should provide enums to retrive
* attributes values */
fprintf(stderr, "Acquisition started at secs:%u ticks:%u\n",
ctrl->attr_channel.ext_val[ZFAD_ATTR_ACQ_START_S],
ctrl->attr_channel.ext_val[ZFAD_ATTR_ACQ_START_C]);
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_S],
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_C]);
fprintf(stderr, "Read %d samples from shot %i/%i secs:%lld ticks:%lld (loop: %d)\n",
ctrl->nsamples,
i + 1, acq_cfg.value[FMCADC_CONF_ACQ_N_SHOTS],
......
libtools/fald-bad-clock.c
View file @ 3adf48c7
......@@ -101,7 +101,7 @@ int main (int argc, char *argv[])
/* Configure ADC internal clock */
adc_sec = sys_start.tv_sec;
adc_ticks = sys_start.tv_nsec / FA_UTC_CLOCK_NS;
adc_ticks = sys_start.tv_nsec / FA100M14B4C_UTC_CLOCK_NS;
fmcadc_set_conf(&brd_cfg, FMCADC_CONF_UTC_TIMING_BASE_T, adc_ticks);
fmcadc_set_conf(&brd_cfg, FMCADC_CONF_UTC_TIMING_BASE_S, adc_sec);
err = fmcadc_apply_config(adc, 0 , &brd_cfg);
......@@ -113,7 +113,7 @@ int main (int argc, char *argv[])
fprintf(stdout,
"ADC clock configured: %010li s %010li ns ( %i %ins ticks)\n",
sys_start.tv_sec, sys_start.tv_nsec,
adc_ticks, FA_UTC_CLOCK_NS);
adc_ticks, FA100M14B4C_UTC_CLOCK_NS);
/* Measure how clock diverge */
......@@ -138,7 +138,7 @@ int main (int argc, char *argv[])
fmcadc_get_conf(&brd_cfg, FMCADC_CONF_UTC_TIMING_BASE_T,
&adc_ticks);
adc_cur.tv_sec = adc_sec;
adc_cur.tv_nsec = adc_ticks * FA_UTC_CLOCK_NS;
adc_cur.tv_nsec = adc_ticks * FA100M14B4C_UTC_CLOCK_NS;
/* Get the difference between system and ADC clock */
timespec_subtract(&dlt_ts, &sys_cur, &adc_cur);
......
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