...
 
Commits (10)
......@@ -370,6 +370,16 @@ int zfad_fsm_command(struct fa_dev *fa, uint32_t command)
return 0;
}
static void fa_init_timetag(struct fa_dev *fa)
{
unsigned long seconds;
seconds = get_seconds();
fa_writel(fa, fa->fa_utc_base, &zfad_regs[ZFA_UTC_SECONDS_U],
(seconds >> 32) & 0xFFFFFFFF);
fa_writel(fa, fa->fa_utc_base, &zfad_regs[ZFA_UTC_SECONDS_L],
(seconds >> 00) & 0xFFFFFFFF);
}
/*
* Specific check and init
......@@ -409,8 +419,9 @@ static int __fa_init(struct fa_dev *fa)
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_SHOTS_NB], 1);
/* Enable the software trigger by default: there is no arm in this */
/* Enable the alternative time source: later it will be done by HDL */
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_CFG_SRC],
FA100M14B4C_TRG_SRC_SW);
FA100M14B4C_TRG_SRC_SW | FA100M14B4C_TRG_SRC_ALT);
/* Zero offsets and release the DAC clear */
zfad_reset_offset(fa);
......@@ -419,9 +430,7 @@ static int __fa_init(struct fa_dev *fa)
/* Initialize channel saturation values */
zfad_init_saturation(fa);
/* Set UTC seconds from the kernel seconds */
fa_writel(fa, fa->fa_utc_base, &zfad_regs[ZFA_UTC_SECONDS],
get_seconds());
fa_init_timetag(fa);
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_EXT_DLY], 0);
......
......@@ -322,8 +322,9 @@ static int zfad_dma_prep_slave_sg(struct dma_chan *dchan,
if (err)
goto err_to_pages;
/* With some version we cannot use the version from the Linux kernel */
max_segment_size = dma_get_max_seg_size(dchan->device->dev);
/* With some version we cannot use the version from the Linux kernel */
fa->sg_alloc_table_from_pages(&zfad_block->sgt, pages, nr_pages,
offset_in_page(zfad_block->block->data),
zfad_block->block->datalen,
......@@ -484,11 +485,13 @@ static void zfad_tstamp_start_get(struct fa_dev *fa,
struct zio_timestamp *ztstamp)
{
ztstamp->secs = fa_readl(fa, fa->fa_utc_base,
&zfad_regs[ZFA_UTC_ACQ_START_SECONDS]);
&zfad_regs[ZFA_UTC_ACQ_START_SECONDS_U]);
ztstamp->secs <<= 32;
ztstamp->secs |= fa_readl(fa, fa->fa_utc_base,
&zfad_regs[ZFA_UTC_ACQ_START_SECONDS_L]);
ztstamp->ticks = fa_readl(fa, fa->fa_utc_base,
&zfad_regs[ZFA_UTC_ACQ_START_COARSE]);
ztstamp->bins = fa_readl(fa, fa->fa_utc_base,
&zfad_regs[ZFA_UTC_ACQ_START_FINE]);
ztstamp->bins = 0;
}
static int zfad_block_timetag_extract(struct zio_block *block,
......
......@@ -105,22 +105,22 @@ const struct zfa_field_desc zfad_regs[] = {
[ZFA_IRQ_VIC_MASK_STATUS] = {0x10, 0x00000003, 0},
/* UTC */
[ZFA_UTC_SECONDS] = {0x00, ~0x0, 0},
[ZFA_UTC_COARSE] = {0x04, ~0x0, 0},
[ZFA_UTC_TRIG_META] = {0x08, ~0x0, 0},
[ZFA_UTC_TRIG_SECONDS] = {0x0C, ~0x0, 0},
[ZFA_UTC_TRIG_COARSE] = {0x10, ~0x0, 0},
[ZFA_UTC_TRIG_FINE] = {0x14, ~0x0, 0},
[ZFA_UTC_ACQ_START_META] = {0x18, ~0x0, 0},
[ZFA_UTC_ACQ_START_SECONDS] = {0x1C, ~0x0, 0},
[ZFA_UTC_ACQ_START_COARSE] = {0x20, ~0x0, 0},
[ZFA_UTC_ACQ_START_FINE] = {0x24, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_META] = {0x28, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_SECONDS] = {0x2C, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_COARSE] = {0x30, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_FINE] = {0x34, ~0x0, 0},
[ZFA_UTC_ACQ_END_META] = {0x38, ~0x0, 0},
[ZFA_UTC_ACQ_END_SECONDS] = {0x3C, ~0x0, 0},
[ZFA_UTC_ACQ_END_COARSE] = {0x40, ~0x0, 0},
[ZFA_UTC_ACQ_END_FINE] = {0x44, ~0x0, 0},
[ZFA_UTC_SECONDS_U] = {0x00, ~0x0, 0},
[ZFA_UTC_SECONDS_L] = {0x04, ~0x0, 0},
[ZFA_UTC_COARSE] = {0x08, ~0x0, 0},
[ZFA_UTC_TRIG_TIME_SECONDS_U] = {0x0C, ~0x0, 0},
[ZFA_UTC_TRIG_TIME_SECONDS_L] = {0x10, ~0x0, 0},
[ZFA_UTC_TRIG_TIME_COARSE] = {0x14, ~0x0, 0},
[ZFA_UTC_TRIG_SECONDS_U] = {0x18, ~0x0, 0},
[ZFA_UTC_TRIG_SECONDS_L] = {0x1C, ~0x0, 0},
[ZFA_UTC_TRIG_COARSE] = {0x20, ~0x0, 0},
[ZFA_UTC_ACQ_START_SECONDS_U] = {0x24, ~0x0, 0},
[ZFA_UTC_ACQ_START_SECONDS_L] = {0x28, ~0x0, 0},
[ZFA_UTC_ACQ_START_COARSE] = {0x2C, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_SECONDS_U] = {0x30, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_SECONDS_L] = {0x34, ~0x0, 0},
[ZFA_UTC_ACQ_STOP_COARSE] = {0x38, ~0x0, 0},
[ZFA_UTC_ACQ_END_SECONDS_U] = {0x3C, ~0x0, 0},
[ZFA_UTC_ACQ_END_SECONDS_L] = {0x40, ~0x0, 0},
[ZFA_UTC_ACQ_END_COARSE] = {0x44, ~0x0, 0},
};
......@@ -67,16 +67,16 @@ static struct zio_attribute zfad_cset_ext_zattr[] = {
ZIO_ATTR_EXT("ch3-50ohm-term", ZIO_RW_PERM, ZFA_CH4_CTL_TERM, 0),
/* last acquisition start time stamp */
ZIO_ATTR_EXT("tstamp-acq-str-s", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_SECONDS, 0),
ZIO_ATTR_EXT("tstamp-acq-str-su", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_SECONDS_U, 0),
ZIO_ATTR_EXT("tstamp-acq-str-sl", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_SECONDS_L, 0),
ZIO_ATTR_EXT("tstamp-acq-str-t", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_COARSE, 0),
ZIO_ATTR_EXT("tstamp-acq-str-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_FINE, 0),
/* Timing base */
ZIO_ATTR_EXT("tstamp-base-s", ZIO_RW_PERM, ZFA_UTC_SECONDS, 0),
ZIO_ATTR_EXT("tstamp-base-su", ZIO_RW_PERM, ZFA_UTC_SECONDS_U, 0),
ZIO_ATTR_EXT("tstamp-base-sl", ZIO_RW_PERM, ZFA_UTC_SECONDS_L, 0),
ZIO_ATTR_EXT("tstamp-base-t", ZIO_RW_PERM, ZFA_UTC_COARSE, 0),
/* Parameters (not attributes) follow */
......@@ -104,19 +104,19 @@ static struct zio_attribute zfad_cset_ext_zattr[] = {
* */
ZIO_PARAM_EXT("fsm-state", ZIO_RO_PERM, ZFA_STA_FSM, 0),
/* last acquisition end time stamp */
ZIO_PARAM_EXT("tstamp-acq-end-s", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-end-su", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_SECONDS_U, 0),
ZIO_PARAM_EXT("tstamp-acq-end-sl", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_SECONDS_L, 0),
ZIO_PARAM_EXT("tstamp-acq-end-t", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-end-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_FINE, 0),
/* last acquisition stop time stamp */
ZIO_PARAM_EXT("tstamp-acq-stp-s", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-su", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_SECONDS_U, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-sl", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_SECONDS_L, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-t", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_FINE, 0),
/* Reset all channel offset */
ZIO_PARAM_EXT("rst-ch-offset", ZIO_WO_PERM, ZFA_CTL_DAC_CLR_N, 1),
......@@ -176,7 +176,8 @@ static int zfad_conf_set(struct device *dev, struct zio_attribute *zattr,
reg_index = zattr->id;
i = FA100M14B4C_NCHAN;
if (zattr->id >= ZFA_UTC_SECONDS && zattr->id <= ZFA_UTC_ACQ_END_FINE)
if (zattr->id >= ZFA_UTC_SECONDS_U &&
zattr->id <= ZFA_UTC_ACQ_END_COARSE)
baseoff = fa->fa_utc_base;
switch (reg_index) {
......@@ -327,7 +328,8 @@ static int zfad_info_get(struct device *dev, struct zio_attribute *zattr,
i = FA100M14B4C_NCHAN;
if (zattr->id >= ZFA_UTC_SECONDS && zattr->id <= ZFA_UTC_ACQ_END_FINE)
if (zattr->id >= ZFA_UTC_SECONDS_U &&
zattr->id <= ZFA_UTC_ACQ_END_COARSE)
baseoff = fa->fa_utc_base;
switch (zattr->id) {
......
......@@ -77,6 +77,19 @@ static struct zio_attribute zfat_ext_zattr[] = {
[FA100M14B4C_TATTR_CH4_DLY] = ZIO_ATTR_EXT("ch3-delay",
ZIO_RW_PERM,
ZFA_CH4_DLY, 0),
/* Time Trigger */
[FA100M14B4C_TATTR_TRG_TIM_SU] = ZIO_ATTR_EXT("trg-time-su",
ZIO_RW_PERM,
ZFA_UTC_TRIG_TIME_SECONDS_U,
0),
[FA100M14B4C_TATTR_TRG_TIM_SL] = ZIO_ATTR_EXT("trg-time-sl",
ZIO_RW_PERM,
ZFA_UTC_TRIG_TIME_SECONDS_L,
0),
[FA100M14B4C_TATTR_TRG_TIM_C] = ZIO_ATTR_EXT("trg-time-t",
ZIO_RW_PERM,
ZFA_UTC_TRIG_TIME_COARSE,
0),
/*
* Delay to apply on the trigger in sampling clock period. The default
......@@ -90,12 +103,15 @@ static struct zio_attribute zfat_ext_zattr[] = {
ZFAT_SW, 0),
/* last trigger time stamp */
[FA100M14B4C_TATTR_TRG_S] = ZIO_PARAM_EXT("tstamp-trg-lst-s",
ZIO_RO_PERM, ZFA_UTC_TRIG_SECONDS, 0),
[FA100M14B4C_TATTR_TRG_SU] = ZIO_PARAM_EXT("tstamp-trg-lst-su",
ZIO_RO_PERM,
ZFA_UTC_TRIG_SECONDS_U, 0),
[FA100M14B4C_TATTR_TRG_SL] = ZIO_PARAM_EXT("tstamp-trg-lst-sl",
ZIO_RO_PERM,
ZFA_UTC_TRIG_SECONDS_L, 0),
[FA100M14B4C_TATTR_TRG_C] = ZIO_PARAM_EXT("tstamp-trg-lst-t",
ZIO_RO_PERM, ZFA_UTC_TRIG_COARSE, 0),
[FA100M14B4C_TATTR_TRG_F] = ZIO_PARAM_EXT("tstamp-trg-lst-b",
ZIO_RO_PERM, ZFA_UTC_TRIG_FINE, 0),
ZIO_RO_PERM,
ZFA_UTC_TRIG_COARSE, 0),
};
......@@ -109,8 +125,13 @@ static int zfat_conf_set(struct device *dev, struct zio_attribute *zattr,
{
struct fa_dev *fa = get_zfadc(dev);
struct zio_ti *ti = to_zio_ti(dev);
void *baseoff = fa->fa_adc_csr_base;
uint32_t tmp_val = usr_val;
if (zattr->id >= ZFA_UTC_SECONDS_U &&
zattr->id <= ZFA_UTC_ACQ_END_COARSE)
baseoff = fa->fa_utc_base;
switch (zattr->id) {
case ZFAT_SHOTS_NB:
if (!tmp_val) {
......@@ -155,7 +176,7 @@ static int zfat_conf_set(struct device *dev, struct zio_attribute *zattr,
return 0;
}
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[zattr->id], tmp_val);
fa_writel(fa, baseoff, &zfad_regs[zattr->id], tmp_val);
return 0;
}
......@@ -168,6 +189,11 @@ static int zfat_info_get(struct device *dev, struct zio_attribute *zattr,
uint32_t *usr_val)
{
struct fa_dev *fa = get_zfadc(dev);
void *baseoff = fa->fa_adc_csr_base;
if (zattr->id >= ZFA_UTC_SECONDS_U &&
zattr->id <= ZFA_UTC_ACQ_END_COARSE)
baseoff = fa->fa_utc_base;
switch (zattr->id) {
case ZFAT_CFG_SRC:
......@@ -178,7 +204,7 @@ static int zfat_info_get(struct device *dev, struct zio_attribute *zattr,
return 0;
}
*usr_val = fa_readl(fa, fa->fa_adc_csr_base, &zfad_regs[zattr->id]);
*usr_val = fa_readl(fa, baseoff, &zfad_regs[zattr->id]);
switch (zattr->id) {
case ZFAT_POST:
(*usr_val)++; /* add the trigger sample */
......@@ -313,7 +339,7 @@ static int zfat_arm_trigger(struct zio_ti *ti)
struct zio_block *block;
struct zfad_block *zfad_block;
unsigned int size;
uint32_t dev_mem_off, trg_src;
uint32_t dev_mem_off;
int i, err = 0;
dev_dbg(fa->msgdev, "Arming trigger\n");
......@@ -385,10 +411,6 @@ static int zfat_arm_trigger(struct zio_ti *ti)
if (err != -EAGAIN && err != 0)
goto out_allocate;
/* Everything looks fine for the time being, enable the trigger sources */
trg_src = ti->zattr_set.ext_zattr[FA100M14B4C_TATTR_SRC].value;
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_CFG_SRC], trg_src);
return err;
out_allocate:
......
......@@ -69,12 +69,15 @@ enum fa100m14b4c_trg_ext_attr {
FA100M14B4C_TATTR_CH2_DLY,
FA100M14B4C_TATTR_CH3_DLY,
FA100M14B4C_TATTR_CH4_DLY,
FA100M14B4C_TATTR_TRG_TIM_SU,
FA100M14B4C_TATTR_TRG_TIM_SL,
FA100M14B4C_TATTR_TRG_TIM_C,
#ifdef __KERNEL__
FA100M14B4C_TATTR_SW_FIRE,
FA100M14B4C_TATTR_TRG_S,
FA100M14B4C_TATTR_TRG_SU,
FA100M14B4C_TATTR_TRG_SL,
FA100M14B4C_TATTR_TRG_C,
FA100M14B4C_TATTR_TRG_F,
#endif
};
......@@ -308,24 +311,24 @@ enum zfadc_dregs_enum {
ZFA_IRQ_VIC_ENABLE_MASK,
ZFA_IRQ_VIC_MASK_STATUS,
/* UTC core */
ZFA_UTC_SECONDS,
ZFA_UTC_SECONDS_U,
ZFA_UTC_SECONDS_L,
ZFA_UTC_COARSE,
ZFA_UTC_TRIG_META,
ZFA_UTC_TRIG_SECONDS,
ZFA_UTC_TRIG_TIME_SECONDS_U,
ZFA_UTC_TRIG_TIME_SECONDS_L,
ZFA_UTC_TRIG_TIME_COARSE,
ZFA_UTC_TRIG_SECONDS_U,
ZFA_UTC_TRIG_SECONDS_L,
ZFA_UTC_TRIG_COARSE,
ZFA_UTC_TRIG_FINE,
ZFA_UTC_ACQ_START_META,
ZFA_UTC_ACQ_START_SECONDS,
ZFA_UTC_ACQ_START_SECONDS_U,
ZFA_UTC_ACQ_START_SECONDS_L,
ZFA_UTC_ACQ_START_COARSE,
ZFA_UTC_ACQ_START_FINE,
ZFA_UTC_ACQ_STOP_META,
ZFA_UTC_ACQ_STOP_SECONDS,
ZFA_UTC_ACQ_STOP_SECONDS_U,
ZFA_UTC_ACQ_STOP_SECONDS_L,
ZFA_UTC_ACQ_STOP_COARSE,
ZFA_UTC_ACQ_STOP_FINE,
ZFA_UTC_ACQ_END_META,
ZFA_UTC_ACQ_END_SECONDS,
ZFA_UTC_ACQ_END_SECONDS_U,
ZFA_UTC_ACQ_END_SECONDS_L,
ZFA_UTC_ACQ_END_COARSE,
ZFA_UTC_ACQ_END_FINE,
ZFA_HW_PARAM_COMMON_LAST,
};
......
Subproject commit d8bef4d89361194c2e5644e751add9bd9ffa106d
Subproject commit e571218f210d42999d852fe833fb97c000f41119