...
 
Commits (2)
......@@ -301,7 +301,6 @@ static int zfad_dma_prep_slave_sg(struct dma_chan *dchan,
struct zio_cset *cset,
struct zfad_block *zfad_block)
{
struct fa_dev *fa = cset->zdev->priv_d;
struct dma_async_tx_descriptor *tx;
struct page **pages;
......@@ -423,6 +422,7 @@ static int zfad_dma_start(struct zio_cset *cset)
struct fa_dev *fa = cset->zdev->priv_d;
struct zfad_block *zfad_block = cset->interleave->priv_d;
struct dma_chan *dchan;
struct dma_slave_config sconfig;
dma_cap_mask_t dma_mask;
int err, i;
......@@ -440,10 +440,6 @@ static int zfad_dma_start(struct zio_cset *cset)
*/
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_CFG_SRC], 0);
/* Fix dev_mem_addr in single-shot mode */
if (fa->n_shots == 1)
zfad_block[0].dev_mem_off = zfad_dev_mem_offset(cset);
dev_dbg(fa->msgdev, "Start DMA transfer\n");
dma_cap_zero(dma_mask);
dma_cap_set(DMA_SLAVE, dma_mask);
......@@ -454,6 +450,14 @@ static int zfad_dma_start(struct zio_cset *cset)
goto err;
}
memset(&sconfig, 0, sizeof(sconfig));
sconfig.direction = DMA_DEV_TO_MEM;
if (fa->n_shots == 1)
sconfig.src_addr = zfad_dev_mem_offset(cset);
sconfig.src_addr_width = 8; /* 2 bytes for each channel (4) */
err = dmaengine_slave_config(dchan, &sconfig);
if (err)
goto err_config;
for (i = 0; i < fa->n_shots; ++i) {
err = zfad_dma_prep_slave_sg(dchan, cset, &zfad_block[i]);
if (err)
......@@ -466,6 +470,7 @@ static int zfad_dma_start(struct zio_cset *cset)
return 0;
err_prep:
err_config:
dmaengine_terminate_all(dchan);
dma_release_channel(dchan);
err:
......@@ -567,7 +572,6 @@ static void zfad_dma_done(struct zio_cset *cset)
{
struct fa_dev *fa = cset->zdev->priv_d;
struct zfad_block *zfad_block = cset->interleave->priv_d;
struct zio_control *ctrl = NULL;
struct zio_ti *ti = cset->ti;
struct zio_block *block = NULL;
struct zio_timestamp ztstamp;
......
......@@ -450,7 +450,6 @@ static int zfad_input_cset_software(struct fa_dev *fa, struct zio_cset *cset)
return -ENOMEM;
tmp->block = cset->interleave->active_block;
cset->interleave->priv_d = tmp;
tmp->dev_mem_off = 0; /* Always the first block */
/* Configure post samples */
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_POST],
......
......@@ -378,11 +378,6 @@ static int zfat_arm_trigger(struct zio_ti *ti)
zio_control_size(interleave));
/* Add to the vector of prepared blocks */
zfad_block[i].block = block;
zfad_block[i].dev_mem_off = dev_mem_off;
dev_mem_off += size;
dev_dbg(fa->msgdev, "next dev_mem_off 0x%x (+%d)\n",
dev_mem_off, size);
zfad_block[i].cset = ti->cset;
}
......
......@@ -458,8 +458,6 @@ struct fa_dev {
/*
* zfad_block
* @block is zio_block which contains data and metadata from a single shot
* @dev_mem_off is the offset in ADC internal memory. It points to the first
* sample of the stored shot
* @first_nent is the index of the first nent used for this block
* @cset: channel set source for the block
* @tx: DMA transfer descriptor
......@@ -467,7 +465,6 @@ struct fa_dev {
*/
struct zfad_block {
struct zio_block *block;
uint32_t dev_mem_off;
unsigned int first_nent;
struct zio_cset *cset;
struct dma_async_tx_descriptor *tx;
......