• Federico Vaga's avatar
    kernel: add test-data from ADC chip · c73a1099
    Federico Vaga authored
    The test data from the FPGA does not exercise the FPGA design.
    With the test data directly from the ADC chip we can use the full
    ADC design.
    
    I decided to evaluate the test mode just before the start of the acquisition
    in order to be able to change the test pattern at any time. Chaning the
    test pattern is useful to identify the different acquisitions and being
    able to validate the acquisition content.
    Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
    c73a1099
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