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FMC ADC 100M 14b 4cha - Testing
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Projects
FMC ADC 100M 14b 4cha - Testing
Commits
19b003d2
Commit
19b003d2
authored
Aug 24, 2017
by
Dimitris Lampridis
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Merge remote-tracking branch 'origin/mcattin_dev' into dlamprid-dev
parents
88134293
98c5a3ef
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33 changed files
with
902 additions
and
249 deletions
+902
-249
fmcadc100m14b4cha.sh
fmcadc100m14b4cha.sh
+1
-1
fix_creothech_batch_2014.sh
tests/fix_creothech_batch_2014.sh
+46
-0
test02.py
tests/test02.py
+22
-6
test07.py
tests/test07.py
+3
-3
test12.py
tests/test12.py
+4
-9
test17.py
tests/test17.py
+4
-9
test18.py
tests/test18.py
+4
-9
test20.py
tests/test20.py
+5
-11
test21.py
tests/test21.py
+2
-7
test23.py
tests/test23.py
+3
-1
test24.py
tests/test24.py
+4
-9
test26.py
tests/test26.py
+3
-9
test27.py
tests/test27.py
+4
-9
test28.py
tests/test28.py
+4
-10
test29.py
tests/test29.py
+3
-9
test30.py
tests/test30.py
+4
-9
test31.py
tests/test31.py
+3
-9
test32.py
tests/test32.py
+4
-9
test33.py
tests/test33.py
+3
-9
test34.py
tests/test34.py
+3
-9
test35.py
tests/test35.py
+2
-7
test36.py
tests/test36.py
+3
-8
test37.py
tests/test37.py
+4
-9
test38.py
tests/test38.py
+2
-7
test39.py
tests/test39.py
+4
-9
test40.py
tests/test40.py
+4
-9
test41.py
tests/test41.py
+4
-9
test42.py
tests/test42.py
+5
-9
test43.py
tests/test43.py
+4
-9
test44.py
tests/test44.py
+24
-26
test45.py
tests/test45.py
+283
-0
test46.py
tests/test46.py
+324
-0
test47.py
tests/test47.py
+110
-0
No files found.
fmcadc100m14b4cha.sh
View file @
19b003d2
...
...
@@ -47,7 +47,7 @@ do
echo
"Test series run
$nb_test
out of
$nb_test_limit
"
echo
" "
sudo
./pts/pts.py
-b
FmcAdc100M14b4cha
-s
$serial
-e
$extra_serial
-t
./tests
-l
$LOGDIR
00 01 02 03 04 05 06 07 08 09 22 19 23 25
sudo
./pts/pts.py
-b
FmcAdc100M14b4cha
-s
$serial
-e
$extra_serial
-t
./tests
-l
$LOGDIR
00 01 02 03 04 05 06 07 08 09 22 19 23
47
25
if
[
"
$nb_test
"
!=
"
$nb_test_limit
"
]
then
...
...
tests/fix_creothech_batch_2014.sh
0 → 100755
View file @
19b003d2
#! /bin/sh
# Scan serial number
serial
=
$1
if
[
x
$1
=
x
""
]
;
then
echo
-n
"Please scan CERN serial number bar-code, then press [ENTER]: "
read
serial
fi
if
[
x
$serial
=
x
""
]
;
then
echo
-n
"Serial numer cannot be empty!!"
exit
fi
if
[
-e
../serial.txt
]
;
then
sudo rm
-f
../serial.txt
fi
echo
$serial
>>
../serial.txt
# Load bitstream
sudo
./test00.py
# Read eeprom, dump to eeprom_content.out
sudo
./test26.py
# Backup eeprom content
cp
eeprom_content.out ../eeprom_bkp/eeprom_
$serial
.bin
# Save calibration data
sudo
sdb-read
-e
0x200 eeprom_content.out calib
>
sdbfs/calib
# Re-write eeprom (new ipmi, saved calibration data)
sudo
./test46.py
# Check eeprom content validity
sudo
./test47.py
echo
"--------------------------------------------------------------"
echo
" "
echo
-n
"End of the test, do you want to switch the computer OFF? [y,n]"
read
reply
if
[
"
$reply
"
=
"y"
]
then
sudo
shutdown
-h
now
fi
tests/test02.py
View file @
19b003d2
...
...
@@ -27,13 +27,17 @@ test02: Test EEPROM access
Note: Requires test00.py to run first to load the gateware!
"""
def
pattern_compare
(
fmc
,
pattern
):
print
"Write data pattern to EEPROM
\n
"
def
pattern_compare
(
fmc
,
offset
,
pattern
):
print
"Write data pattern to EEPROM
at offset 0x
%4
X
\n
"
%
offset
#print [hex(a) for a in pattern]
fmc
.
sys_i2c_eeprom_write
(
pattern
)
#fmc.sys_i2c_eeprom_write(pattern)
fmc
.
eeprom_24aa64
.
wr_page
(
offset
,
pattern
)
time
.
sleep
(
0.1
)
print
"Read back data from EEPROM
\n
"
rd_pattern
=
fmc
.
sys_i2c_eeprom_read
(
0x0
,
len
(
pattern
))
#
rd_pattern = fmc.sys_i2c_eeprom_read(0x0, len(pattern))
#print [hex(a) for a in rd_pattern]
rd_pattern
=
fmc
.
eeprom_24aa64
.
rd_seq
(
offset
,
len
(
pattern
))
time
.
sleep
(
0.1
)
print
"Data comparison:"
print
"written read => result"
mismatch
=
0
...
...
@@ -55,6 +59,7 @@ def main (default_directory='.'):
EEPROM_ADDR
=
0x50
PATTERN_A
=
[
0x55
,
0xAA
,
0x00
,
0xFF
]
PATTERN_B
=
[
0xAA
,
0x55
,
0xFF
,
0x00
]
WRITE_OFFSET
=
0x1000
start_test_time
=
time
.
time
()
...
...
@@ -91,11 +96,18 @@ def main (default_directory='.'):
if
(
EEPROM_ADDR
!=
periph_addr
[
0
]):
error
=
"Wrong device mounted on system management I2C bus or soldering issues, address is:0x
%.2
X expected:0x
%.2
X"
%
(
periph_addr
[
0
],
EEPROM_ADDR
)
# Save content of the area used for the test
print
(
'Saving test area eeprom content.'
)
area_content
=
fmc
.
eeprom_24aa64
.
rd_seq
(
WRITE_OFFSET
,
len
(
PATTERN_A
))
time
.
sleep
(
0.1
)
print
[(
"0x
%02
X"
%
a
)
for
a
in
area_content
]
print
(
''
)
# Write, read back and compare two different patterns
try
:
mismatch
=
0
mismatch
+=
pattern_compare
(
fmc
,
PATTERN_A
)
mismatch
+=
pattern_compare
(
fmc
,
PATTERN_B
)
mismatch
+=
pattern_compare
(
fmc
,
WRITE_OFFSET
,
PATTERN_A
)
mismatch
+=
pattern_compare
(
fmc
,
WRITE_OFFSET
,
PATTERN_B
)
except
FmcAdc100mOperationError
as
e
:
raise
PtsError
(
"EEPROM write/read/compare test failed:
%
s"
%
e
)
...
...
@@ -104,6 +116,10 @@ def main (default_directory='.'):
else
:
print
(
'Data comparison OK.'
)
# Restores the saved content to the area used for test
print
(
'
\n
Restoring test area eeprom content.'
)
fmc
.
eeprom_24aa64
.
wr_page
(
WRITE_OFFSET
,
area_content
)
time
.
sleep
(
0.1
)
print
""
print
"==> End of test
%02
d"
%
TEST_NB
...
...
tests/test07.py
View file @
19b003d2
...
...
@@ -162,7 +162,7 @@ def main (default_directory='.'):
acq_data_mean
=
acq_mean
(
acq_data
)
for
i
in
range
(
len
(
acq_data_mean
)):
print
"ADC channel
%
d value:
%
d expected value:
%
d"
%
(
i
+
1
,
acq_data_mean
[
i
],
ADC_POS
)
if
(
ADC_POS
!=
acq_data_mean
[
i
]
):
if
(
ADC_POS
!=
int
(
acq_data_mean
[
i
])
):
print
"Channel
%
d offset circuit is malfunctioning"
%
(
i
+
1
)
error
+=
1
# raise PtsError('Channel %d offset circuit is malfunctioning'%i)
...
...
@@ -179,7 +179,7 @@ def main (default_directory='.'):
acq_data_mean
=
acq_mean
(
acq_data
)
for
i
in
range
(
len
(
acq_data_mean
)):
print
"ADC channel
%
d value:
%
d expected value:
%
d +/-
%
d"
%
(
i
+
1
,
acq_data_mean
[
i
],
ADC_MID
,
ADC_TOL
)
if
((
ADC_MID
-
ADC_TOL
>
acq_data_mean
[
i
])
|
(
ADC_MID
+
ADC_TOL
<
acq_data_mean
[
i
]
)):
if
((
ADC_MID
-
ADC_TOL
>
int
(
acq_data_mean
[
i
]))
|
(
ADC_MID
+
ADC_TOL
<
int
(
acq_data_mean
[
i
])
)):
print
"Channel
%
d offset circuit is malfunctioning"
%
(
i
+
1
)
error
+=
1
# raise PtsError('Channel %d offset circuit is malfunctioning'%i)
...
...
@@ -197,7 +197,7 @@ def main (default_directory='.'):
acq_data_mean
=
acq_mean
(
acq_data
)
for
i
in
range
(
len
(
acq_data_mean
)):
print
"ADC channel
%
d value:
%
d expected value:
%
d"
%
(
i
+
1
,
acq_data_mean
[
i
],
ADC_NEG
)
if
(
ADC_NEG
!=
acq_data_mean
[
i
]
):
if
(
ADC_NEG
!=
int
(
acq_data_mean
[
i
])
):
print
"Channel
%
d offset circuit is malfunctioning"
%
(
i
+
1
)
error
+=
1
# raise PtsError('Channel %d offset circuit is malfunctioning'%i)
...
...
tests/test12.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -31,6 +22,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test12: Takes an acquisition of each channels separately and print it to a file and on the screen
...
...
tests/test17.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
import
rr
from
ptsexcept
import
*
# Import specific modules
from
numpy
import
*
from
pylab
import
*
...
...
@@ -32,6 +23,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
import
rr
from
ptsexcept
import
*
"""
test17: Plot all channels
...
...
tests/test18.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
numpy
import
*
from
pylab
import
*
...
...
@@ -29,6 +20,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test18: Test calibration box
...
...
tests/test20.py
View file @
19b003d2
...
...
@@ -12,17 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
sys
.
path
.
append
(
'../../fmceeprom/python/'
)
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -35,6 +24,11 @@ from PAGE.Agilent33250A import *
from
PAGE.SineWaveform
import
*
from
ctypes
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
"""
...
...
tests/test21.py
View file @
19b003d2
...
...
@@ -13,18 +13,13 @@ import time
import
os
import
re
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import specific modules
from
cp210x_eeprom
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
cp210x_eeprom
import
*
"""
test21: Store calibration data to CP2103 EEPROM
...
...
tests/test23.py
View file @
19b003d2
...
...
@@ -308,7 +308,8 @@ P1 Bank A nb signal=%d, P1 Bank B nb signal=%d, P2 Bank A nb signal=%d, P2 Bank
fmc
.
sys_i2c_eeprom_write
(
eeprom_data
)
#==================================================
# Read back EEPROM content via I2C
# Read back EEPROM content via I2C and compare with written data
print
"Read EEPROM content and compare.
\n
"
eeprom_data_read
=
fmc
.
sys_i2c_eeprom_read
(
0
,
len
(
eeprom_data
))
mismatch
=
0
for
i
in
range
(
len
(
eeprom_data
)):
...
...
@@ -327,6 +328,7 @@ P1 Bank A nb signal=%d, P1 Bank B nb signal=%d, P2 Bank A nb signal=%d, P2 Bank
else
:
print
"FAILED"
except
FmcAdc100mOperationError
as
e
:
raise
PtsError
(
"Test failed:
%
s"
%
e
)
...
...
tests/test24.py
View file @
19b003d2
...
...
@@ -13,20 +13,15 @@ import time
import
os
import
re
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
cp210x_eeprom
import
*
from
ctypes
import
*
import
find_usb_tty
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test24: Read calibration data from CP2103 EEPROM
...
...
tests/test26.py
View file @
19b003d2
...
...
@@ -12,21 +12,15 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
sys
.
path
.
append
(
'../../fmceeprom/python/'
)
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test26: Read FMC EEPROM
...
...
tests/test27.py
View file @
19b003d2
...
...
@@ -11,20 +11,15 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
from
numpy
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test27: Test DMA
...
...
tests/test28.py
View file @
19b003d2
...
...
@@ -12,17 +12,7 @@ import os
import
math
import
random
as
rdm
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
from
numpy
import
*
...
...
@@ -34,6 +24,10 @@ from find_usb_tty import *
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test28: Long term test
...
...
tests/test29.py
View file @
19b003d2
...
...
@@ -12,21 +12,15 @@ import time
import
datetime
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
sys
.
path
.
append
(
'../../fmceeprom/python/'
)
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test29: Checks FMC EEPROM for existing data
...
...
tests/test30.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -31,6 +22,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test30: Test software reset.
...
...
tests/test31.py
View file @
19b003d2
...
...
@@ -13,21 +13,15 @@ import time
import
datetime
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
sys
.
path
.
append
(
'../../fmceeprom/python/'
)
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test31: Fix EEPROM content:
...
...
tests/test32.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -33,6 +24,10 @@ from PAGE.SineWaveform import *
import
scipy.optimize
as
optimize
import
scipy.fftpack
as
fftpack
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test32: Test decimation
...
...
tests/test33.py
View file @
19b003d2
...
...
@@ -12,21 +12,15 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
sys
.
path
.
append
(
'../../fmceeprom/python/'
)
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test33: Write FMC EEPROM
...
...
tests/test34.py
View file @
19b003d2
...
...
@@ -12,20 +12,14 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test34: Test interrupts (EIC + VIC)
...
...
tests/test35.py
View file @
19b003d2
...
...
@@ -12,18 +12,13 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import specific modules
from
fmc_adc_spec
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
"""
test35: Prints carrier CSR (without loading the gateware)
...
...
tests/test36.py
View file @
19b003d2
...
...
@@ -12,19 +12,14 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test36: Test SDB records
...
...
tests/test37.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -31,6 +22,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test37: Test trigger timetags (single and multi shot modes)
...
...
tests/test38.py
View file @
19b003d2
...
...
@@ -12,18 +12,13 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import specific modules
from
fmc_adc_spec
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
"""
test38: Load gateware, try to access to an un-mapped wishbone address -> the host shouldn't hang!
...
...
tests/test39.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -31,6 +22,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test39: Tests saturation with/without gain/offset correction
...
...
tests/test40.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -32,6 +23,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test40: Tests hardware internal trigger (threshold, deglitch)
...
...
tests/test41.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -31,6 +22,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test41: Tests shots counter
...
...
tests/test42.py
View file @
19b003d2
...
...
@@ -12,21 +12,17 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
from
numpy
import
*
from
pylab
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test42: Tests sampling frequency counter
"""
...
...
tests/test43.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -31,6 +22,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test43: Tests saturation (-> no wraparound)
...
...
tests/test44.py
View file @
19b003d2
...
...
@@ -12,15 +12,6 @@ import sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
...
...
@@ -32,6 +23,10 @@ import find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test44: Tests external trigger and datapath delay difference.
...
...
@@ -184,7 +179,7 @@ def main (default_directory='.'):
# Constants declaration
TEST_NB
=
44
FMC_ADC_BITSTREAM
=
'../
firm
wares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM
=
'../
gate
wares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM
=
os
.
path
.
join
(
default_directory
,
FMC_ADC_BITSTREAM
)
EXPECTED_BITSTREAM_TYPE
=
0x1
...
...
@@ -210,16 +205,16 @@ def main (default_directory='.'):
print
"Loading hardware access library and opening device.
\n
"
spec
=
rr
.
Gennum
()
# Load FMC ADC
firm
ware
print
"Loading FMC ADC
firm
ware:
%
s
\n
"
%
FMC_ADC_BITSTREAM
# Load FMC ADC
gate
ware
print
"Loading FMC ADC
gate
ware:
%
s
\n
"
%
FMC_ADC_BITSTREAM
if
(
os
.
path
.
isfile
(
FMC_ADC_BITSTREAM
)):
spec
.
load_
firm
ware
(
FMC_ADC_BITSTREAM
)
spec
.
load_
gate
ware
(
FMC_ADC_BITSTREAM
)
time
.
sleep
(
2
)
else
:
raise
PtsCritical
(
"
Firm
ware file
\"
%
s
\"
is missing, test stopped."
%
FMC_ADC_BITSTREAM
)
raise
PtsCritical
(
"
Gate
ware file
\"
%
s
\"
is missing, test stopped."
%
FMC_ADC_BITSTREAM
)
# Carrier object declaration (SPEC board specific part)
# Used to check that the
firm
ware is loaded.
# Used to check that the
gate
ware is loaded.
try
:
carrier
=
CFmcAdc100mSpec
(
spec
,
EXPECTED_BITSTREAM_TYPE
)
except
FmcAdc100mSpecOperationError
as
e
:
...
...
@@ -233,7 +228,7 @@ def main (default_directory='.'):
try
:
"""
# Others objects declaration
usb_tty
=
find_usb_tty
.
CttyUSB
()
awg_tty
=
usb_tty
.
find_usb_tty
(
AWG_USB_VENDOR_ID
,
AWG_USB_PRODUCT_ID
)
...
...
@@ -241,7 +236,7 @@ def main (default_directory='.'):
gen
=
Agilent33250A
(
device
=
awg_tty
[
0
],
bauds
=
AWG_BAUD
)
sine
=
SineWaveform
()
box
=
CCalibr_box
(
box_tty
[
0
])
"""
# Initialise fmc adc
fmc_adc_init
(
spec
,
fmc
)
...
...
@@ -271,7 +266,6 @@ def main (default_directory='.'):
time.sleep(3)
fs_clk = fmc.get_samp_freq()
print("Sampling frequency:
%
d Hz"
%
fs_clk)
"""
print("
\
Reduce sampling frequency")
fmc.si570.wr_reg(0x89,(1<<4)) # freeze DCO
...
...
@@ -291,6 +285,8 @@ def main (default_directory='.'):
fmc.si570.recall_nvm()
fmc.print_si570_config()
"""
time
.
sleep
(
3
)
fs_clk
=
fmc
.
get_samp_freq
()
print
(
"Sampling frequency:
%
d Hz"
%
fs_clk
)
...
...
@@ -323,15 +319,16 @@ def main (default_directory='.'):
##################################################
# Set awg sine params
##################################################
#sine.frequency = 20
E3
#
sine.amplitude = 0.4 * ADC_FS[IN_RANGE]
#
sine.dc = 0
sine
.
frequency
=
1
E3
sine
.
amplitude
=
0.4
*
ADC_FS
[
IN_RANGE
]
sine
.
dc
=
0
#print "\nSine frequency:%3.3fMHz amplitude:%2.3fVp offset:%2.3fV" % (sine.frequency/1E6, sine.amplitude, sine.dc)
# Set AWG
#
gen.connect()
#
gen.play(sine)
gen
.
connect
()
gen
.
play
(
sine
)
#gen.output = True
#time.sleep(AWG_SET_SLEEP)
gen
.
sync
=
True
time
.
sleep
(
AWG_SET_SLEEP
)
##################################################
# Configure analogue input
...
...
@@ -477,8 +474,9 @@ def main (default_directory='.'):
open_all_channels
(
fmc
)
# Switch AWG OFF
#gen.output = False
#gen.close()
gen
.
output
=
False
gen
.
sync
=
False
gen
.
close
()
# Check if an error occured during frequency response test
# if(error != 0):
...
...
tests/test45.py
0 → 100755
View file @
19b003d2
#! /usr/bin/env python
# coding: utf8
# Copyright CERN, 2011
# Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Last modifications: 30/5/2012
# Import system modules
import
sys
import
time
import
os
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
from
numpy
import
*
from
pylab
import
*
from
calibr_box
import
*
import
find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
# Import common modules
from
ptsexcept
import
*
import
rr
"""
test45: Test second counter.
Note: Requires test00.py to run first to load the gateware!
"""
NB_CHANNELS
=
4
AWG_SET_SLEEP
=
0.3
SSR_SET_SLEEP
=
0.05
BOX_SET_SLEEP
=
0.01
ACQ_TIMEOUT
=
10
PRE_TRIG_SAMPLES
=
10
POST_TRIG_SAMPLES
=
100
BYTES_PER_SAMPLE
=
2
TRIG_TIMETAG_BYTES
=
16
def
open_all_channels
(
fmc
):
for
i
in
range
(
1
,
NB_CHANNELS
+
1
):
fmc
.
set_input_range
(
i
,
'OPEN'
)
time
.
sleep
(
SSR_SET_SLEEP
)
def
fmc_adc_init
(
spec
,
fmc
):
print
"Initialise FMC board:
\n
reset dc offset DACs
\n
open all channels
\n
config trigger: software"
# Reset offset DACs
fmc
.
dc_offset_reset
()
# Make sure all switches are OFF
open_all_channels
(
fmc
)
# Set software trigger
fmc
.
set_soft_trig
()
# Set acquisition
fmc
.
set_pre_trig_samples
(
PRE_TRIG_SAMPLES
)
fmc
.
set_post_trig_samples
(
POST_TRIG_SAMPLES
)
# Converts two's complement hex to signed
def
hex2signed
(
value
):
if
(
value
&
0x8000
):
return
-
((
~
value
&
0xFFFF
)
+
1
)
else
:
return
value
# Converts digital value to volts
def
digital2volt
(
value
,
full_scale
,
nb_bit
):
return
float
(
value
)
*
float
(
full_scale
)
/
2
**
nb_bit
def
make_acq
(
fmc
,
pause
,
shots
=
1
):
# Make sure no acquisition is running
fmc
.
stop_acq
()
time
.
sleep
(
pause
)
# Start acquisition
fmc
.
start_acq
()
# Trigger
for
i
in
range
(
shots
):
time
.
sleep
(
pause
)
fmc
.
sw_trig
()
#print("Trigger %d"%i)
# Wait end of acquisition
timeout
=
0
while
(
'IDLE'
!=
fmc
.
get_acq_fsm_state
()):
time
.
sleep
(
.1
)
timeout
+=
1
if
(
ACQ_TIMEOUT
<
timeout
):
print
"Acquisition timeout. Missing trigger?."
print
"Acq FSm state:
%
s"
%
fmc
.
get_acq_fsm_state
()
return
fmc
.
get_trig_pos
()
def
get_acq_data
(
carrier
,
start_addr
,
data_length
):
# Retrieve data trough DMA
carrier
.
enable_dma_done_irq
()
channels_data
=
carrier
.
get_data
(
start_addr
,
data_length
)
carrier
.
disable_dma_done_irq
()
return
channels_data
def
plot_channels
(
ch_data
,
adc_fs
):
ylimit
=
adc_fs
/
2
sample
=
arange
(
len
(
ch_data
)
/
4
)
# Convert raw data to volts
ch_data
=
[
hex2signed
(
item
)
for
item
in
ch_data
]
ch_data
=
[
digital2volt
(
item
,
adc_fs
,
16
)
for
item
in
ch_data
]
# Plot
plot
(
sample
,
ch_data
[
0
::
4
],
'b'
,
label
=
'Channel 1'
)
plot
(
sample
,
ch_data
[
1
::
4
],
'g'
,
label
=
'Channel 2'
)
plot
(
sample
,
ch_data
[
2
::
4
],
'm'
,
label
=
'Channel 3'
)
plot
(
sample
,
ch_data
[
3
::
4
],
'c'
,
label
=
'Channel 4'
)
ylim
(
-
ylimit
-
(
ylimit
/
10.0
),
ylimit
+
(
ylimit
/
10.0
))
grid
(
color
=
'k'
,
linestyle
=
'--'
,
linewidth
=
1
)
legend
(
loc
=
'upper left'
)
show
()
return
0
def
main
(
default_directory
=
'.'
):
# Constants declaration
TEST_NB
=
45
FMC_ADC_BITSTREAM
=
'../gatewares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM
=
os
.
path
.
join
(
default_directory
,
FMC_ADC_BITSTREAM
)
EXPECTED_BITSTREAM_TYPE
=
0x1
# Calibration box vendor and product IDs
BOX_USB_VENDOR_ID
=
0x10c4
# Cygnal Integrated Products, Inc.
BOX_USB_PRODUCT_ID
=
0xea60
# CP210x Composite Device
# Agilent AWG serial access vendor and product IDs
AWG_USB_VENDOR_ID
=
0x0403
# Future Technology Devices International, Ltd
AWG_USB_PRODUCT_ID
=
0x6001
# FT232 USB-Serial (UART) IC
AWG_BAUD
=
57600
error
=
0
start_test_time
=
time
.
time
()
print
"================================================================================"
print
"Test
%02
d start
\n
"
%
TEST_NB
# SPEC object declaration
print
"Loading hardware access library and opening device.
\n
"
spec
=
rr
.
Gennum
()
# Load FMC ADC gateware
print
"Loading FMC ADC gateware:
%
s
\n
"
%
FMC_ADC_BITSTREAM
if
(
os
.
path
.
isfile
(
FMC_ADC_BITSTREAM
)):
spec
.
load_gateware
(
FMC_ADC_BITSTREAM
)
time
.
sleep
(
2
)
else
:
raise
PtsCritical
(
"Gateware file
\"
%
s
\"
is missing, test stopped."
%
FMC_ADC_BITSTREAM
)
# Carrier object declaration (SPEC board specific part)
# Used to check that the gateware is loaded.
try
:
carrier
=
CFmcAdc100mSpec
(
spec
,
EXPECTED_BITSTREAM_TYPE
)
except
FmcAdc100mSpecOperationError
as
e
:
raise
PtsCritical
(
"Carrier init failed, test stopped:
%
s"
%
e
)
# Mezzanine object declaration (FmcAdc100m14b4cha board specific part)
try
:
fmc
=
CFmcAdc100m
(
spec
)
except
FmcAdc100mOperationError
as
e
:
raise
PtsCritical
(
"Mezzanine init failed, test stopped:
%
s"
%
e
)
try
:
# Others objects declaration
usb_tty
=
find_usb_tty
.
CttyUSB
()
awg_tty
=
usb_tty
.
find_usb_tty
(
AWG_USB_VENDOR_ID
,
AWG_USB_PRODUCT_ID
)
box_tty
=
usb_tty
.
find_usb_tty
(
BOX_USB_VENDOR_ID
,
BOX_USB_PRODUCT_ID
)
gen
=
Agilent33250A
(
device
=
awg_tty
[
0
],
bauds
=
AWG_BAUD
)
sine
=
SineWaveform
()
box
=
CCalibr_box
(
box_tty
[
0
])
# Initialise fmc adc
fmc_adc_init
(
spec
,
fmc
)
# Use test data instead of data from ADC
# fmc.test_data_en()
# Use data pattern instead of ADC data
# fmc.testpat_en(0x2000)
# Set UTC
current_time
=
time
.
time
()
utc_seconds
=
int
(
current_time
)
fmc
.
set_utc_second_cnt
(
utc_seconds
)
utc_coarse
=
int
((
current_time
-
utc_seconds
)
/
8E-9
)
fmc
.
set_utc_coarse_cnt
(
utc_coarse
)
print
(
"
\n
UTC core initialisation:
\n
seconds counter: 0x
%08
X
\n
coarse counter: 0x
%08
X"
%
(
fmc
.
get_utc_second_cnt
(),
fmc
.
get_utc_coarse_cnt
()))
nb_iter
=
'a'
while
(
not
(
nb_iter
.
isdigit
())):
nb_iter
=
raw_input
(
"
\n
Number of iteration: "
)
nb_iter
=
int
(
nb_iter
)
total_err
=
0
for
i
in
range
(
nb_iter
):
time
.
sleep
(
1
)
err
=
''
sys_time
=
time
.
time
()
sys_sec
=
int
(
sys_time
)
adc_sec
=
fmc
.
get_utc_second_cnt
()
adc_8ns
=
fmc
.
get_utc_coarse_cnt
()
adc_time
=
adc_sec
+
(
adc_8ns
*
8E-9
)
if
sys_sec
!=
adc_sec
:
err
=
' ERROR !!'
total_err
+=
1
print
(
"----------------------
\n
itr:
%
d
\n
err:
%
d
\n
sys:
%10.9
f
\n
adc:
%10.9
f
%
s"
%
(
i
,
total_err
,
sys_time
,
adc_time
,
err
))
print
(
"Total number of errors:
%
d"
%
(
total_err
))
"""
# Acquisition parameters
ACQ_PAUSE = 1 # pause between acq. stop and start, start and trigger
IN_RANGE = '100mV'
IN_TERM = 'ON'
ADC_FS = {'10V':10.0, '1V':1.0, '100mV':0.1}
print("
\n
Analog inputs config:
\n
termination:
%
s
\n
range:
%
s"
%
(IN_TERM, IN_RANGE))
for ch in range(NB_CHANNELS):
# Configure analogue input
fmc.set_input_range(ch+1, IN_RANGE)
fmc.set_input_term(ch+1, IN_TERM)
time.sleep(SSR_SET_SLEEP)
# Set sine params
sine.frequency = 1E6
sine.amplitude = 0.8 * ADC_FS[IN_RANGE]
sine.dc = 0
print "
\n
Sine generator:
\n
frequency:
%3.3
fMHz
\n
amplitude:
%2.3
fVp
\n
offset:
%2.3
fV"
%
(sine.frequency/1E6, sine.amplitude, sine.dc)
# Set AWG
gen.connect()
gen.play(sine)
gen.output = True
time.sleep(AWG_SET_SLEEP)
# connect AWG to channel 1
box.select_output_ch(1)
time.sleep(BOX_SET_SLEEP)
"""
######################################################################################
# Make sure all switches are OFF
open_all_channels
(
fmc
)
# Switch AWG OFF
gen
.
output
=
False
gen
.
close
()
# Check if an error occured during frequency response test
if
(
error
!=
0
):
raise
PtsError
(
'An error occured, check log for details.'
)
except
(
FmcAdc100mSpecOperationError
,
FmcAdc100mOperationError
,
CalibrBoxOperationError
)
as
e
:
raise
PtsError
(
"Test failed:
%
s"
%
e
)
print
""
print
"==> End of test
%02
d"
%
TEST_NB
print
"================================================================================"
end_test_time
=
time
.
time
()
print
"Test
%02
d elapsed time:
%.2
f seconds
\n
"
%
(
TEST_NB
,
end_test_time
-
start_test_time
)
if
__name__
==
'__main__'
:
main
()
tests/test46.py
0 → 100755
View file @
19b003d2
#! /usr/bin/env python
# coding: utf8
# Copyright CERN, 2011
# Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Last modifications: 16/5/2012
# Import system modules
import
sys
import
time
import
datetime
import
os
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
"""
test46: Write IPMI information and calibration data to FMC EEPROM.
This is done using gensdbfs tool.
Serial number is taken from a text file (../serial.txt).
Calibration data are taken from a binary file (sdbfs/calib).
Note: Requires test00.py to run first to load the gateware!
Is meant to run with fix_creotech_batch_2014.sh
"""
def
main
(
default_directory
=
'.'
):
# Constants declaration
TEST_NB
=
46
EXPECTED_BITSTREAM_TYPE
=
0x1
NAME
=
'adc_100m'
MANUFACTURER
=
"CERN"
PRODUCT_NAME
=
"FmcAdc100m14b4cha"
PART_NUMBER
=
"EDA-02063-V5-0"
SERIAL_FILENAME
=
"../serial.txt"
SERIAL_FILENAME
=
os
.
path
.
join
(
default_directory
,
SERIAL_FILENAME
)
SDBFS_DIR
=
"sdbfs/"
SDBFS_DIR
=
os
.
path
.
join
(
default_directory
,
SDBFS_DIR
)
IPMI_BIN_FILENAME
=
SDBFS_DIR
+
"IPMI-FRU"
CALIBR_BIN_FILENAME
=
SDBFS_DIR
+
"calib"
NAME_BIN_FILENAME
=
SDBFS_DIR
+
"name"
EEPROM_BIN_FILENAME
=
"eeprom_content.out"
EEPROM_BIN_FILENAME
=
os
.
path
.
join
(
default_directory
,
EEPROM_BIN_FILENAME
)
EEPROM_SIZE
=
8192
# in Bytes
start_test_time
=
time
.
time
()
print
"================================================================================"
print
"Test
%02
d start
\n
"
%
TEST_NB
# SPEC object declaration
print
"Loading hardware access library and opening device.
\n
"
spec
=
rr
.
Gennum
()
# Carrier object declaration (SPEC board specific part)
try
:
carrier
=
CFmcAdc100mSpec
(
spec
,
EXPECTED_BITSTREAM_TYPE
)
except
FmcAdc100mSpecOperationError
as
e
:
raise
PtsCritical
(
"Carrier init failed, test stopped:
%
s"
%
e
)
# Mezzanine object declaration (FmcAdc100m14b4cha board specific part)
try
:
fmc
=
CFmcAdc100m
(
spec
)
except
FmcAdc100mOperationError
as
e
:
raise
PtsCritical
(
"Mezzanine init failed, test stopped:
%
s"
%
e
)
###########################################################################
# Real test stuff here
try
:
#==================================================
# Read serial number from a file
# This file must be written by the shell script launching pts
f_serial
=
open
(
SERIAL_FILENAME
,
'r+'
)
serial
=
f_serial
.
readline
()
f_serial
.
close
()
serial
=
serial
[:
-
1
]
# remove EOL char
print
"Board's serial number:
%
s
\n
"
%
serial
#==================================================
# Calculate number of minutes since 0:00 1/1/96
current_date
=
datetime
.
datetime
.
now
()
ref_date
=
datetime
.
datetime
(
1996
,
1
,
1
)
diff_date
=
current_date
-
ref_date
current_date_min
=
int
(
diff_date
.
total_seconds
()
//
60
)
print
(
"Current date/time:
%
s"
%
(
str
(
current_date
)))
print
(
" -> 0x
%06
X =
%
d minutes (since 0:00 1/1/96)
\n
"
%
(
current_date_min
,
current_date_min
))
################################################################################
# Check if a manufacturing date is present in the EEPROM.
# If not, put the current date (it means it's the first time the test is run).
# If a date is present, keep it.
# EEPROM clear code used to test the test!
#eeprom_data = [0x0] * EEPROM_SIZE
#fmc.sys_i2c_eeprom_write(eeprom_data)
# Read entire EEPROM
#print "Read EEPROM content."
eeprom_data_read
=
fmc
.
sys_i2c_eeprom_read
(
0
,
EEPROM_SIZE
)
# Write EEPROM data to binary file
#print "Write EEPROM content to file (binary)."
f_eeprom
=
open
(
EEPROM_BIN_FILENAME
,
"wb"
)
for
byte
in
eeprom_data_read
:
f_eeprom
.
write
(
chr
(
byte
))
f_eeprom
.
close
()
# Get manufacturing date from EEPROM data, if exists
eeprom_data
=
open
(
EEPROM_BIN_FILENAME
,
"rb"
)
.
read
()
mfg_date_min
=
ipmi_get_mfg_date
(
eeprom_data
)
ref_date
=
datetime
.
datetime
(
1996
,
1
,
1
)
mfg_date
=
ref_date
+
datetime
.
timedelta
(
minutes
=
mfg_date_min
)
print
(
"Mfg date read from eeprom:
%
s"
%
(
str
(
mfg_date
)))
print
(
" -> 0x
%06
X =
%
d minutes (since 0:00 1/1/96)
\n
"
%
(
mfg_date_min
,
mfg_date_min
))
first_prod_date
=
datetime
.
datetime
(
2013
,
3
,
4
)
diff_date
=
first_prod_date
-
ref_date
first_prod_date_min
=
int
(
diff_date
.
total_seconds
()
//
60
)
# No manufacturing date present in EEPROM, put the current date
if
(
mfg_date_min
==
0
|
mfg_date_min
==
0xffffff
):
print
(
"No manufacturing date found in the EEPROM => taking current date:
%
s
\n
"
%
str
(
current_date
))
mfg_date_min
=
current_date_min
elif
(
mfg_date_min
>
current_date_min
):
print
(
"Date found in the EEPROM is in the future => taking current date:
%
s
\n
"
%
str
(
current_date
))
mfg_date_min
=
current_date_min
elif
(
mfg_date_min
<
first_prod_date_min
):
print
(
"Date found in the EEPROM is older than the first production => taking current date:
%
s
\n
"
%
str
(
current_date
))
mfg_date_min
=
current_date_min
else
:
print
(
"Valid manufacturing date found in EEPROM:
%
s (will be preserved)
\n
"
%
str
(
mfg_date
))
#==================================================
# Create Board Info Area
# FRU field is used to store the date of generation of the eeprom content
# This could be used later to determine if the content has to be udated (bug fix, ...)
print
(
"EEPROM content generation date:
%
s
\n
"
%
str
(
current_date
))
print
(
"IPMI: Board Info Area"
)
print
(
" - Mfg. Date/Time : 0x
%06
X"
%
mfg_date_min
)
print
(
" - Board Manufacturer :
%
s"
%
MANUFACTURER
)
print
(
" - Board Product Name :
%
s"
%
PRODUCT_NAME
)
print
(
" - Board Serial Number:
%
s"
%
serial
)
print
(
" - Board Part Number :
%
s"
%
PART_NUMBER
)
print
(
" - FRU File ID :
%
s"
%
str
(
current_date
))
print
(
""
)
fru
=
"
%
s"
%
str
(
current_date
)
bia
=
BoardInfoArea
(
mfg_date_min
,
MANUFACTURER
,
PRODUCT_NAME
,
serial
,
PART_NUMBER
,
fru
)
#==================================================
# Multirecords Area
print
(
"IPMI: Multi-record area"
)
# output number, vnom, vmin, vmax, ripple, imin, imax
vnom
=
2.5
;
vmin
=
2.375
;
vmax
=
2.625
;
ripple
=
0.0
;
imin
=
0
;
imax
=
4000
print
(
" - DC Load (VADJ): vnom=
%2.3
fV, vmin=
%2.3
fV, vmax=
%2.3
fV, ripple=
%2.3
fV, imin=
%
dmA, imax=
%
dmA"
%
(
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
))
dcload0
=
DCLoadRecord
(
0
,
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
)
# VADJ
vnom
=
3.3
;
vmin
=
3.135
;
vmax
=
3.465
;
ripple
=
0.0
;
imin
=
0
;
imax
=
3000
print
(
" - DC Load (P3V3): vnom=
%2.3
fV, vmin=
%2.3
fV, vmax=
%2.3
fV, ripple=
%2.3
fV, imin=
%
dmA, imax=
%
dmA"
%
(
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
))
dcload1
=
DCLoadRecord
(
1
,
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
)
# P3V3
vnom
=
12.0
;
vmin
=
11.4
;
vmax
=
12.6
;
ripple
=
0.0
;
imin
=
0
;
imax
=
1000
print
(
" - DC Load (P12V): vnom=
%2.3
fV, vmin=
%2.3
fV, vmax=
%2.3
fV, ripple=
%2.3
fV, imin=
%
dmA, imax=
%
dmA"
%
(
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
))
dcload2
=
DCLoadRecord
(
2
,
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
)
# P12V
dcload
=
[
dcload0
,
dcload1
,
dcload2
]
# output number, vnom, vmin, vmax, ripple, imin, imax
vnom
=
0.0
;
vmin
=
0.0
;
vmax
=
0.0
;
ripple
=
0.0
;
imin
=
0
;
imax
=
0
print
(
" - DC Out (VIO_B_M2C): vnom=
%2.3
fV, vmin=
%2.3
fV, vmax=
%2.3
fV, ripple=
%2.3
fV, imin=
%
dmA, imax=
%
dmA"
%
(
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
))
dcout0
=
DCOutputRecord
(
3
,
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
)
# VIO_B_M2C
print
(
" - DC Out (VREF_A_M2C): vnom=
%2.3
fV, vmin=
%2.3
fV, vmax=
%2.3
fV, ripple=
%2.3
fV, imin=
%
dmA, imax=
%
dmA"
%
(
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
))
dcout1
=
DCOutputRecord
(
4
,
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
)
# VREF_A_M2C
print
(
" - DC Out (VREF_B_M2C): vnom=
%2.3
fV, vmin=
%2.3
fV, vmax=
%2.3
fV, ripple=
%2.3
fV, imin=
%
dmA, imax=
%
dmA"
%
(
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
))
dcout2
=
DCOutputRecord
(
5
,
vnom
,
vmin
,
vmax
,
ripple
,
imin
,
imax
)
# VREF_B_M2C
dcout
=
[
dcout0
,
dcout1
,
dcout2
]
# module size : 0=single width, 1=double width
# P1 size : 0=LPC, 1=HPC
# P2 size : 0=LPC, 1=HPC, 3=not fitted
# clock dir : 0=M2C, 1=C2M
# nb sig P1 A : number
# nb sig P1 B : number
# nb sig P2 A : number
# nb sig P2 B : number
# nb GBT P1 : number
# nb GBT P2 : number
# max TCK freq : frequency in MHz
size
=
0
;
p1_size
=
0
;
p2_size
=
3
;
clk_dir
=
0
;
sig_p1_a
=
68
;
sig_p1_b
=
0
;
sig_p2_a
=
0
;
sig_p2_b
=
0
;
gbt_p1
=
0
;
gbt_p2
=
0
;
tck
=
0
print
(
" - OEM: Module Size=
%
d, P1 Connector Size=
%
d, P2 Connector Size=
%
d, Clock Direction=
%
d,
\
P1 Bank A nb signal=
%
d, P1 Bank B nb signal=
%
d, P2 Bank A nb signal=
%
d, P2 Bank B nb signal=
%
d, P1 GBT nb=
%
d, P2 GBT nb=
%
d, TCK max freq=
%
d
\n
"
%
(
size
,
p1_size
,
p2_size
,
clk_dir
,
sig_p1_a
,
sig_p1_b
,
sig_p2_a
,
sig_p2_b
,
gbt_p1
,
gbt_p2
,
tck
))
oem
=
OEMRecord
(
size
,
p1_size
,
p2_size
,
clk_dir
,
sig_p1_a
,
sig_p1_b
,
sig_p2_a
,
sig_p2_b
,
gbt_p1
,
gbt_p2
,
tck
)
#==================================================
# Write ipmi content to a binary file
print
(
"Generate binary file with IPMI crap.
\n
"
)
ipmi_open_file
(
IPMI_BIN_FILENAME
)
ipmi_set
(
bia
,
dcload
,
dcout
,
oem
)
ipmi_write
()
ipmi_close_file
()
#==================================================
# Read impi content from binary file
f_ipmi
=
open
(
IPMI_BIN_FILENAME
,
"rb"
)
ipmi_data
=
[]
byte
=
f_ipmi
.
read
(
1
)
# reads one byte
while
byte
:
ipmi_data
.
append
(
ord
(
byte
))
byte
=
f_ipmi
.
read
(
1
)
# reads one byte
f_ipmi
.
close
()
#print "Raw IPMI data:"
#for add, data in enumerate(ipmi_data):
# print "0x%02X(%3d): 0x%02X" % (add, add, data)
#==================================================
# Write 'name' file
print
(
"Writing
%
s with:
%
s"
%
(
NAME_BIN_FILENAME
,
NAME
))
f_name
=
open
(
NAME_BIN_FILENAME
,
"wb"
)
for
char
in
NAME
:
f_name
.
write
(
char
)
f_name
.
close
()
#==================================================
# Create an empty 'data' folder
data_dir
=
SDBFS_DIR
+
"data"
if
(
not
(
os
.
path
.
exists
(
data_dir
))):
cmd
=
"mkdir "
+
data_dir
print
(
"Create empty data folder, cmd:
%
s
\n
"
%
(
cmd
))
os
.
system
(
cmd
)
else
:
print
(
"
%
s folder already exists.
\n
"
%
(
data_dir
))
#==================================================
# Generate eeprom image with gensdbfs
cmd
=
"gensdbfs "
+
SDBFS_DIR
+
" "
+
EEPROM_BIN_FILENAME
print
(
"Generate eeprom image, cmd:
%
s
\n
"
%
(
cmd
))
os
.
system
(
cmd
)
#==================================================
# Erase EEPROM content
print
"Erase EEPROM content.
\n
"
eeprom_data
=
[
0x0
]
*
EEPROM_SIZE
fmc
.
sys_i2c_eeprom_write
(
eeprom_data
)
#==================================================
# Read eeprom content from binary file
f_bin_eeprom
=
open
(
EEPROM_BIN_FILENAME
,
"rb"
)
eeprom_data
=
[]
byte
=
f_bin_eeprom
.
read
(
1
)
# reads one byte
while
byte
:
eeprom_data
.
append
(
ord
(
byte
))
byte
=
f_bin_eeprom
.
read
(
1
)
# reads one byte
f_bin_eeprom
.
close
()
#==================================================
# Dump EEPROM content to log
print
(
"Content to be written to the eeprom (length=0x
%
X (
%
d)):"
%
(
len
(
eeprom_data
),
len
(
eeprom_data
)))
for
i
in
range
(
len
(
eeprom_data
)
/
16
):
print
(
"0x
%04
X"
%
(
i
*
16
)),
for
j
in
range
(
16
):
print
(
"
%02
X"
%
eeprom_data
[(
i
*
16
)
+
j
]),
print
(
""
)
print
(
""
)
#==================================================
# Write content to EEPROM via I2C
print
"Write EEPROM content.
\n
"
if
eeprom_data
!=
[]:
fmc
.
sys_i2c_eeprom_write
(
eeprom_data
)
#==================================================
# Read back EEPROM content via I2C
eeprom_data_read
=
fmc
.
sys_i2c_eeprom_read
(
0
,
len
(
eeprom_data
))
mismatch
=
0
for
i
in
range
(
len
(
eeprom_data
)):
wr_data
=
eeprom_data
[
i
]
rd_data
=
eeprom_data_read
[
i
]
if
wr_data
==
rd_data
:
check
=
"OK"
else
:
check
=
"FAILED"
mismatch
+=
1
print
"0x
%02
X 0x
%02
X =>
%
s"
%
(
wr_data
,
rd_data
,
check
)
#print "0x%02X 0x%02X => %s" % (wr_data, rd_data, check)
print
"EEPROM content comparison => "
,
if
(
mismatch
==
0
):
print
"OK"
else
:
print
"FAILED"
except
FmcAdc100mOperationError
as
e
:
raise
PtsError
(
"Test failed:
%
s"
%
e
)
###########################################################################
print
""
print
"==> End of test
%02
d"
%
TEST_NB
print
"================================================================================"
end_test_time
=
time
.
time
()
print
"Test
%02
d elapsed time:
%.2
f seconds
\n
"
%
(
TEST_NB
,
end_test_time
-
start_test_time
)
# Check if an error occured during EEPROM verification
if
(
mismatch
!=
0
):
raise
PtsError
(
"EEPROM comparison failed:
%
d mismatch found. Check log for details."
%
mismatch
)
if
__name__
==
'__main__'
:
main
()
tests/test47.py
0 → 100755
View file @
19b003d2
#! /usr/bin/env python
# coding: utf8
# Copyright CERN, 2011
# Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Last modifications: 16/5/2012
# Import system modules
import
sys
import
time
import
datetime
import
os
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
# Import common modules
from
ptsexcept
import
*
from
fmc_eeprom
import
*
import
rr
"""
test47: Read eeprom and check validity
Note: Requires test00.py to run first to load the gateware!
Requires test23.py to run to write eeprom data.
"""
def
main
(
default_directory
=
'.'
):
# Constants declaration
TEST_NB
=
47
EXPECTED_BITSTREAM_TYPE
=
0x1
EEPROM_SIZE
=
8192
# in Bytes
EEPROM_EXPECTED_CONTENT
=
[
01
,
00
]
start_test_time
=
time
.
time
()
print
"================================================================================"
print
"Test
%02
d start
\n
"
%
TEST_NB
# SPEC object declaration
print
"Loading hardware access library and opening device.
\n
"
spec
=
rr
.
Gennum
()
# Carrier object declaration (SPEC board specific part)
try
:
carrier
=
CFmcAdc100mSpec
(
spec
,
EXPECTED_BITSTREAM_TYPE
)
except
FmcAdc100mSpecOperationError
as
e
:
raise
PtsCritical
(
"Carrier init failed, test stopped:
%
s"
%
e
)
# Mezzanine object declaration (FmcAdc100m14b4cha board specific part)
try
:
fmc
=
CFmcAdc100m
(
spec
)
except
FmcAdc100mOperationError
as
e
:
raise
PtsCritical
(
"Mezzanine init failed, test stopped:
%
s"
%
e
)
###########################################################################
# Real test stuff here
try
:
# Read entire EEPROM
print
"Read EEPROM content."
eeprom_data_read
=
fmc
.
sys_i2c_eeprom_read
(
0
,
EEPROM_SIZE
)
#==================================================
# Check eeprom content validity
print
"Check EEPROM content validity.
\n
"
mismatch
=
0
for
i
in
range
(
len
(
EEPROM_EXPECTED_CONTENT
)):
expect_data
=
EEPROM_EXPECTED_CONTENT
[
i
]
rd_data
=
eeprom_data_read
[
i
]
if
expect_data
==
rd_data
:
check
=
"OK"
else
:
check
=
"FAILED"
mismatch
+=
1
#print "0x%02X 0x%02X => %s" % (expect_data, rd_data, check)
print
"0x
%02
X: 0x
%02
X == 0x
%02
X ? =>
%
s"
%
(
i
,
expect_data
,
rd_data
,
check
)
print
"EEPROM content validity check => "
,
if
(
mismatch
==
0
):
print
"OK"
else
:
print
"FAILED"
except
FmcAdc100mOperationError
as
e
:
raise
PtsError
(
"Test failed:
%
s"
%
e
)
###########################################################################
print
""
print
"==> End of test
%02
d"
%
TEST_NB
print
"================================================================================"
end_test_time
=
time
.
time
()
print
"Test
%02
d elapsed time:
%.2
f seconds
\n
"
%
(
TEST_NB
,
end_test_time
-
start_test_time
)
# Check if an error occured during EEPROM verification
if
(
mismatch
!=
0
):
raise
PtsError
(
"EEPROM validity check failed:
%
d mismatch found. Check log for details."
%
mismatch
)
if
__name__
==
'__main__'
:
main
()
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