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FMC ADC 100M 14b 4cha - Testing
Commit 76161177 authored by Dimitris Lampridis's avatar Dimitris Lampridis
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tests: make sure that generator, when used, is set to drive 50ohm loads

parent 0ba13e1e
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Showing with 16 additions and 1 deletion
pts @ 5c26daca
Subproject commit f9d07331c1477487a9fae97284beb1fb4c14c4d3
Subproject commit 5c26daca0a2f687444fb16951392d4482a461644
tests/test06.py
View file @ 76161177
......@@ -76,6 +76,7 @@ def main (default_directory='.'):
# Set AWG and turn it ON
gen.connect()
gen.load50 = True
gen.output = True
gen.sync = True
gen.play(sine)
......
tests/test08.py
View file @ 76161177
......@@ -213,6 +213,7 @@ def main (default_directory='.'):
# Set AWG and turn it ON
gen.connect()
gen.load50 = True
gen.output = True
# Configure acquisition
......
tests/test09.py
View file @ 76161177
......@@ -223,6 +223,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
# Test frequency response of all channels
......
tests/test11.py
View file @ 76161177
......@@ -187,6 +187,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
# Get physical addresses of the pages for DMA transfer
......
tests/test12.py
View file @ 76161177
......@@ -236,6 +236,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test14.py
View file @ 76161177
......@@ -185,6 +185,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test15.py
View file @ 76161177
......@@ -217,6 +217,7 @@ def main (default_directory='.'):
# Connect to AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
gen.sync = True
time.sleep(AWG_SET_SLEEP)
......
tests/test16.py
View file @ 76161177
......@@ -190,6 +190,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
......
tests/test22.py
View file @ 76161177
......@@ -190,6 +190,7 @@ def main (default_directory='.'):
sine.dc = 0
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
# Read SPEC unique ID and print to log
......
tests/test30.py
View file @ 76161177
......@@ -211,6 +211,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test32.py
View file @ 76161177
......@@ -276,6 +276,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test37.py
View file @ 76161177
......@@ -226,6 +226,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test39.py
View file @ 76161177
......@@ -260,6 +260,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test40.py
View file @ 76161177
......@@ -321,6 +321,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
tests/test41.py
View file @ 76161177
......@@ -318,6 +318,7 @@ def main (default_directory='.'):
# Set AWG
gen.connect()
gen.play(sine)
gen.load50 = True
gen.output = True
time.sleep(AWG_SET_SLEEP)
......
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