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FMC ADC 100M 14b 4cha - Testing
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FMC ADC 100M 14b 4cha - Testing
Commits
9cef5a14
Commit
9cef5a14
authored
Apr 23, 2014
by
Matthieu Cattin
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fmc_adc: Add threshold filter and test mode to trigger configuration print method.
parent
f343d7ee
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4 additions
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2 deletions
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-2
fmc_adc.py
test/fmcadc100m14b4cha/python/fmc_adc.py
+4
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test/fmcadc100m14b4cha/python/fmc_adc.py
View file @
9cef5a14
...
...
@@ -688,9 +688,11 @@ class CFmcAdc100m:
sw_en
=
self
.
fmc_adc_csr
.
get_field
(
'TRIG_CFG'
,
'SW_TRIG_EN'
)
channel
=
self
.
fmc_adc_csr
.
get_field
(
'TRIG_CFG'
,
'INT_TRIG_SEL'
)
+
1
int_thres
=
self
.
fmc_adc_csr
.
get_field
(
'TRIG_CFG'
,
'INT_TRIG_THRES'
)
int_thres_filt
=
self
.
fmc_adc_csr
.
get_field
(
'TRIG_CFG'
,
'INT_TRIG_THRES_FILT'
)
int_test
=
self
.
fmc_adc_csr
.
get_field
(
'TRIG_CFG'
,
'INT_TRIG_TEST_EN'
)
delay
=
self
.
fmc_adc_csr
.
get_reg
(
'TRIG_DLY'
)
print
(
"[FmcAdc100m] Trigger config => hw_en:
%
s, sw_en:
%
s, hw_sel:
%
s, hw_pol:
%
s, int_channel:
%
d, int_thres: 0x
%04
X
, delay:
%
d"
%
(
DIS_EN
[
hw_en
],
DIS_EN
[
sw_en
],
HW_SEL
[
hw_sel
],
HW_POL
[
hw_pol
],
channel
,
int_thres
,
delay
))
print
(
"[FmcAdc100m] Trigger config => hw_en:
%
s, sw_en:
%
s, hw_sel:
%
s, hw_pol:
%
s, int_channel:
%
d, int_thres: 0x
%04
X, int_thres_filt: 0x
%02
X, int_test:
%
s
, delay:
%
d"
%
(
DIS_EN
[
hw_en
],
DIS_EN
[
sw_en
],
HW_SEL
[
hw_sel
],
HW_POL
[
hw_pol
],
channel
,
int_thres
,
int_thres_filt
,
DIS_EN
[
int_test
],
delay
))
# Internal trigger
def
set_int_trig
(
self
,
channel
,
polarity
,
threshold
):
...
...
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