Commit e6c22156 authored by Matthieu Cattin's avatar Matthieu Cattin

struct: Rename firmware in gateware.

parent b128b8ed
......@@ -11,7 +11,7 @@ Website: http://www.ohwr.org/projects/pts
This batch of tests the fonctionnality of the FmcAdc100M14b4cha:
- test00: Loads firmware and test mezzanine presence
- test00: Loads gateware and test mezzanine presence
- test01: 1-wire: read serial unique ID and store
- test02: I2C EEPROM: write, read back and compare
- test03: LEDs: Switch ON and ask operator
......
......@@ -45,7 +45,7 @@ from PAGE.SineWaveform import *
# Constants declaration
NB_POINTS = 1000
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the firmware
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the gateware
ADC_FS = 10.0
USB_DEVICE = "/dev/ttyUSB0"
......@@ -215,15 +215,15 @@ if __name__ == "__main__":
m.show()
m.setWindowTitle("Fmc Adc 100Ms/s Demo")
# Load firmware to FPGA
# Load gateware to FPGA
default_directory = '.'
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
#path_firmware = '../firmwares/spec_fmcadc100m14b4cha_test.bin';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
#path_gateware = '../gatewares/spec_fmcadc100m14b4cha_test.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
# Objects declaration
......
......@@ -26,7 +26,7 @@ from fmc_adc_spec import *
"""
test00: Load firmware, verify firmware type and test mezzanine presence line.
test00: Load gateware, verify gateware type and test mezzanine presence line.
"""
def main (default_directory='.'):
......@@ -34,7 +34,7 @@ def main (default_directory='.'):
# Constants declaration
TEST_NB = 0
#FMC_ADC_ADDR = '1a39:0004/1a39:0004@000B:0000'
FMC_ADC_BITSTREAM = '../firmwares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM = '../gatewares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM = os.path.join(default_directory, FMC_ADC_BITSTREAM)
EXPECTED_BITSTREAM_TYPE = 0x1
......@@ -53,13 +53,13 @@ def main (default_directory='.'):
#spec.bind(FMC_ADC_ADDR)
# Load FMC ADC firmware
print "Loading FMC ADC firmware: %s\n" % FMC_ADC_BITSTREAM
# Load FMC ADC gateware
print "Loading FMC ADC gateware: %s\n" % FMC_ADC_BITSTREAM
if(os.path.isfile(FMC_ADC_BITSTREAM)):
spec.load_firmware(FMC_ADC_BITSTREAM)
spec.load_gateware(FMC_ADC_BITSTREAM)
time.sleep(2)
else:
raise PtsCritical("Firmware file \"%s\" is missing, test stopped." % FMC_ADC_BITSTREAM)
raise PtsCritical("Gateware file \"%s\" is missing, test stopped." % FMC_ADC_BITSTREAM)
# Carrier object declaration (SPEC board specific part)
try:
......
......@@ -29,7 +29,7 @@ from fmc_adc import *
"""
test01: Test 1-wire thermometer and read the unique ID.
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
def main (default_directory='.'):
......
......@@ -29,7 +29,7 @@ from fmc_adc import *
"""
test02: Test EEPROM access
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
def pattern_compare(fmc, pattern):
......@@ -71,7 +71,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -29,7 +29,7 @@ from fmc_adc import *
"""
test03: Test mezzanine front-panel LEDs
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
......@@ -48,7 +48,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -28,7 +28,7 @@ from fmc_adc import *
"""
test04: Test Si570 programmable oscillator
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
def main (default_directory='.'):
......@@ -52,7 +52,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -28,7 +28,7 @@ from fmc_adc import *
"""
test05: Test LTC2174 ADC
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
def main (default_directory='.'):
......@@ -49,7 +49,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -32,7 +32,7 @@ from PAGE.SineWaveform import *
"""
test06: Test trigger input
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
def main (default_directory='.'):
......@@ -59,7 +59,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -29,7 +29,7 @@ from numpy import *
"""
test07: Test offset DACs
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
NB_CHANNELS = 4
......@@ -128,7 +128,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -34,7 +34,7 @@ from PAGE.SineWaveform import *
"""
test08: Test analogue front-end switches
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
......@@ -189,7 +189,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -36,7 +36,7 @@ from PAGE.SineWaveform import *
test09: Test analogue front-end frequency response,
with limits check
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
NB_CHANNELS = 4
......@@ -194,7 +194,7 @@ def main (default_directory='.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -20,7 +20,7 @@ from pylab import *
"""
test10: Plot frequency response summary data from test09_freq_resp.txt file
Note: Requires test00.py to run first to load the firmware and
Note: Requires test00.py to run first to load the gateware and
test09.py to generate the file.
"""
......
......@@ -25,7 +25,7 @@ from PAGE.SineWaveform import *
"""
test11: Test acquisition chain
Note: If not used with Chipscope, requires test00.py to run first to load the firmware!
Note: If not used with Chipscope, requires test00.py to run first to load the gateware!
"""
GN4124_CSR = 0x0
......@@ -39,7 +39,7 @@ SSR_SET_SLEEP = 0.05
ACQ_TIMEOUT = 10
MAX_FIRMWARE_RELOAD = 10
MAX_GATEWARE_RELOAD = 10
PRE_TRIG_SAMPLES = 1000
POST_TRIG_SAMPLES = 1000
......@@ -48,15 +48,15 @@ NB_SHOTS = 1
DMA_LENGTH = 4096 # DMA length in bytes
def load_firmware(default_directory):
print('Load firmware to FPGA')
def load_gateware(default_directory):
print('Load gateware to FPGA')
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
......@@ -150,14 +150,14 @@ def show_result_graph(points, ch_diff):
def main (default_directory='.'):
"""
# Load firmware to FPGA
# Load gateware to FPGA
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
"""
......@@ -204,11 +204,11 @@ def main (default_directory='.'):
if(retry != 0):
retry_cnt += 1
print('RETRY: %d')%(retry_cnt)
if(MAX_FIRMWARE_RELOAD < retry_cnt):
print('Maximium of %d retry exceeded (channel:%d, freq:%2.3fMHz)')%(MAX_FIRMWARE_RELOAD, i, points[j][0]/1E6)
if(MAX_GATEWARE_RELOAD < retry_cnt):
print('Maximium of %d retry exceeded (channel:%d, freq:%2.3fMHz)')%(MAX_GATEWARE_RELOAD, i, points[j][0]/1E6)
error += 1
break
#load_firmware(default_directory)
#load_gateware(default_directory)
#fmc_adc_init(spec, fmc)
#time.sleep(2)
break
......
......@@ -36,7 +36,7 @@ from PAGE.SineWaveform import *
test12: Takes an acquisition of each channels separately and print it to a file and on the screen
Set UTC and read UTC time-tags
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
......@@ -143,7 +143,7 @@ def main (default_directory='.'):
# Constants declaration
TEST_NB = 12
FMC_ADC_BITSTREAM = '../firmwares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM = '../gatewares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM = os.path.join(default_directory, FMC_ADC_BITSTREAM)
EXPECTED_BITSTREAM_TYPE = 0x1
......@@ -164,16 +164,16 @@ def main (default_directory='.'):
print "Loading hardware access library and opening device.\n"
spec = rr.Gennum()
# Load FMC ADC firmware
print "Loading FMC ADC firmware: %s\n" % FMC_ADC_BITSTREAM
# Load FMC ADC gateware
print "Loading FMC ADC gateware: %s\n" % FMC_ADC_BITSTREAM
if(os.path.isfile(FMC_ADC_BITSTREAM)):
spec.load_firmware(FMC_ADC_BITSTREAM)
spec.load_gateware(FMC_ADC_BITSTREAM)
time.sleep(2)
else:
raise PtsCritical("Firmware file \"%s\" is missing, test stopped." % FMC_ADC_BITSTREAM)
raise PtsCritical("Gateware file \"%s\" is missing, test stopped." % FMC_ADC_BITSTREAM)
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -21,28 +21,28 @@ import spec_fmc_adc
"""
test13: Test 1-wire thermometer and read the unique ID of the SPEC board.
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
FAMILY_CODE = 0x28
def load_firmware(default_directory):
print('Load firmware to FPGA')
def load_gateware(default_directory):
print('Load gateware to FPGA')
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
def main (default_directory='.'):
# Load firmware
load_firmware(default_directory)
# Load gateware
load_gateware(default_directory)
# Objects declaration
spec = rr.Gennum() # bind to the SPEC board
......
......@@ -25,7 +25,7 @@ from PAGE.SineWaveform import *
"""
test14: pre-trigger ansd post-trigger counter test
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
GN4124_CSR = 0x0
......@@ -39,7 +39,7 @@ SSR_SET_SLEEP = 0.05
ACQ_TIMEOUT = 10
MAX_FIRMWARE_RELOAD = 10
MAX_GATEWARE_RELOAD = 10
PRE_TRIG_SAMPLES = 50
POST_TRIG_SAMPLES = 50
......@@ -48,15 +48,15 @@ NB_SHOTS = 3
DMA_LENGTH = 4096 # DMA length in bytes
def load_firmware(default_directory):
print('Load firmware to FPGA')
def load_gateware(default_directory):
print('Load gateware to FPGA')
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
......@@ -134,19 +134,19 @@ def acquisition(gnum, pages, fmc, channels_data, check_same, spec_fmc):
def main (default_directory='.'):
load_firmware = raw_input('Do you want to load the firmware? [y,n]')
if(load_firmware == 'y'):
# Load firmware to FPGA
load_gateware = raw_input('Do you want to load the gateware? [y,n]')
if(load_gateware == 'y'):
# Load gateware to FPGA
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
if('y' == raw_input('Test firmware? [y,n]')):
path_firmware = '../firmwares/spec_fmcadc100m14b4cha_test.bin';
if('y' == raw_input('Test gateware? [y,n]')):
path_gateware = '../gatewares/spec_fmcadc100m14b4cha_test.bin';
else:
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
......
......@@ -27,7 +27,7 @@ from PAGE.SineWaveform import *
"""
test15: Test trigger configurations
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
# Calibration box vendor and product IDs
......@@ -54,20 +54,20 @@ NB_SHOTS = 1
ACQ_LENGTH = 50000 # in samples
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the firmware
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the gateware
ADC_FS = 10
DAC_NBITS = 16
DAC_FS = 10 # DAC full scale range is 10V
def load_firmware(default_directory):
print "Load firmware to FPGA"
def load_gateware(default_directory):
print "Load gateware to FPGA"
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
def disconnect_channels(fmc):
......@@ -176,19 +176,19 @@ def plot_ch(data, ylimit, trig_level=0):
def main (default_directory='.'):
# Load firmware
load_firmware = raw_input('Do you want to load the firmware? [y,n]')
if(load_firmware == 'y'):
# Load firmware to FPGA
# Load gateware
load_gateware = raw_input('Do you want to load the gateware? [y,n]')
if(load_gateware == 'y'):
# Load gateware to FPGA
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
if('y' == raw_input('Test firmware? [y,n]')):
path_firmware = '../firmwares/spec_fmcadc100m14b4cha_test.bin';
if('y' == raw_input('Test gateware? [y,n]')):
path_gateware = '../gatewares/spec_fmcadc100m14b4cha_test.bin';
else:
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
# Objects declaration
......
......@@ -26,7 +26,7 @@ from PAGE.SineWaveform import *
"""
test16: Test analogue front-end frequency response
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
# Calibration box vendor and product IDs
......@@ -57,15 +57,15 @@ STOP_FREQ = 80E6
STEP_FREQ = 500E3
def load_firmware(default_directory):
print('Load firmware to FPGA')
def load_gateware(default_directory):
print('Load gateware to FPGA')
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
......@@ -156,14 +156,14 @@ def digital2volt(value, full_scale, nb_bit):
def main (default_directory='.'):
# Load firmware to FPGA
# Load gateware to FPGA
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha_test.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha_test.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
......
......@@ -36,7 +36,7 @@ from PAGE.SineWaveform import *
"""
test17: Plot all channels
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
GN4124_CSR = 0x0
......@@ -57,7 +57,7 @@ DAC_SET_SLEEP = 0.01
ACQ_TIMEOUT = 10
MAX_FIRMWARE_RELOAD = 10
MAX_GATEWARE_RELOAD = 10
PRE_TRIG_SAMPLES = 2000
POST_TRIG_SAMPLES = 50000
......@@ -66,7 +66,7 @@ NB_SHOTS = 1
ACQ_LENGTH = 50000 # in samples
DMA_LENGTH = 4096 # in bytes
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the firmware
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the gateware
DAC_NBITS = 16
DAC_FS = 10 # DAC full scale range is 10V
......@@ -192,18 +192,18 @@ def main (default_directory = '.'):
# Constants declaration
TEST_NB = 19
EXPECTED_BITSTREAM_TYPE = 0x1
FMC_ADC_BITSTREAM = '../firmwares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM = '../gatewares/spec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM = os.path.join(default_directory, FMC_ADC_BITSTREAM)
# Objects declaration
spec = rr.Gennum() # bind to the SPEC board
print "Loading FMC ADC firmware: %s\n" % FMC_ADC_BITSTREAM
print "Loading FMC ADC gateware: %s\n" % FMC_ADC_BITSTREAM
if(os.path.isfile(FMC_ADC_BITSTREAM)):
spec.load_firmware(FMC_ADC_BITSTREAM)
spec.load_gateware(FMC_ADC_BITSTREAM)
time.sleep(2)
else:
raise PtsCritical("Firmware file \"%s\" is missing, test stopped." % FMC_ADC_BITSTREAM)
raise PtsCritical("Gateware file \"%s\" is missing, test stopped." % FMC_ADC_BITSTREAM)
carrier = fmc_adc_spec.CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
fmc = fmc_adc.CFmcAdc100m(spec)
......@@ -214,7 +214,7 @@ def main (default_directory = '.'):
sine = SineWaveform()
box = calibr_box.CCalibr_box(box_tty[0])
# Work-around to make dma work with sdb firmware
# Work-around to make dma work with sdb gateware
#carrier.gnum.set_local_bus_freq(200)
print "GN4124 local bus freq: ", carrier.gnum.get_local_bus_freq()
......
......@@ -37,7 +37,7 @@ from PAGE.SineWaveform import *
"""
test19: Calibration
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
NB_CHANNELS = 4
......@@ -55,7 +55,7 @@ NB_SHOTS = 1
ACQ_LENGTH = 50000 # in samples
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the firmware
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the gateware
DAC_NBITS = 16
DAC_FS = 10 # DAC full scale range is 10V
......@@ -303,7 +303,7 @@ def main (default_directory = '.'):
spec = rr.Gennum()
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
# Used to check that the gateware is loaded.
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
......
......@@ -27,7 +27,7 @@ from PAGE.SineWaveform import *
"""
test19_2: Calibration (recursive approach)
Note: Requires test00.py to run first to load the firmware!
Note: Requires test00.py to run first to load the gateware!
"""
GN4124_CSR = 0x0
......@@ -48,7 +48,7 @@ DAC_SET_SLEEP = 0.1
ACQ_TIMEOUT = 10
MAX_FIRMWARE_RELOAD = 10
MAX_GATEWARE_RELOAD = 10
PRE_TRIG_SAMPLES = 1000
POST_TRIG_SAMPLES = 100000
......@@ -57,20 +57,20 @@ NB_SHOTS = 1
ACQ_LENGTH = 50000 # in samples
DMA_LENGTH = 4096 # in bytes
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the firmware
ADC_NBITS = 16 # ADC chip is 14 bits, but shifted to 16 bits in the gateware
DAC_NBITS = 16
DAC_FS = 10 # DAC full scale range is 10V
def load_firmware(default_directory):
print('Load firmware to FPGA')
def load_gateware(default_directory):
print('Load gateware to FPGA')
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha_test.bin';
path_gateware = '../gatewares/spec_fmcadc100m14b4cha_test.bin';
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
gateware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_gateware)
print gateware_loader + ' ' + bitstream
os.system( gateware_loader + ' ' + bitstream )
time.sleep(2);
......@@ -255,8 +255,8 @@ def calc_od(Vm1, Vm2, Vm3, Vm4, Vref1):
def main (default_directory = '.'):
# Load firmware to FPGA
load_firmware(default_directory)
# Load gateware to FPGA