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FMC ADC 1G 8b 2cha
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FMC ADC 1G 8b 2cha
Issues
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26
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27
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OSC1 frequency stability/tuning range
#28
· opened
Sep 23, 2020
by
Tomasz Wlostowski
Schematic done
hw
important
3
updated
Oct 15, 2020
Optimize clock distribution
#27
· opened
Sep 23, 2020
by
Tomasz Wlostowski
Schematic done
hw
important
question
8
updated
Oct 15, 2020
WR DAC reference voltage
#26
· opened
Sep 23, 2020
by
Tomasz Wlostowski
Schematic done
hw
important
1
updated
Oct 08, 2020
Trigger comparator hysteresis
#25
· opened
Sep 23, 2020
by
Tomasz Wlostowski
Schematic done
hw
important
1
updated
Oct 08, 2020
Output clock coupling
#24
· opened
Sep 23, 2020
by
Tomasz Wlostowski
Schematic done
hw
minor
1
updated
Oct 08, 2020
IC4O, IC43 - what's the role of this chip in the design?
#23
· opened
Sep 23, 2020
by
Tomasz Wlostowski
Schematic done
hw
minor
question
1
updated
Oct 08, 2020
Bug in negative LDO enable generation
#21
· opened
Sep 22, 2020
by
Christos Gentsos
Schematic done
Critical
hw
3
updated
Oct 06, 2020
Wrong net label in FMC_Bus
#20
· opened
Sep 22, 2020
by
Dimitris Lampridis
Schematic done
Critical
hw
1
updated
Oct 06, 2020
Is Vadj = 2.2V realistic?
#19
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
hw
question
3
updated
Oct 06, 2020
Remove unused signals from the FMCCLOCKS harness
#18
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
cosmetics
hw
2
updated
Oct 06, 2020
VREF_A_M2C connection can be removed
#17
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
cosmetics
hw
1
updated
Oct 06, 2020
Consider adding placement comments for T1/T2
#16
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
cosmetics
hw
1
updated
Oct 06, 2020
Fix TVS rating labels in ClockTrigIO
#15
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
cosmetics
hw
1
updated
Oct 06, 2020
Issues with "No ERC" markers
#14
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
hw
important
2
updated
Oct 06, 2020
Cleanup remaining warnings
#13
· opened
Sep 21, 2020
by
Dimitris Lampridis
Schematic done
hw
minor
1
updated
Oct 06, 2020
Use Net Classes / Parameter Sets for specifying things likes controlled impedance
#12
· opened
Sep 21, 2020
by
Dimitris Lampridis
Schematic done
hw
minor
1
updated
Oct 06, 2020
Use "Differential Pair" directive and suffixes for differential signal pairs
#11
· opened
Sep 21, 2020
by
Dimitris Lampridis
Schematic done
hw
minor
1
updated
Oct 06, 2020
Consider renaming the CH[1,2]CAL[50R,1M]P signals
#10
· opened
Sep 21, 2020
by
Christos Gentsos
Schematic done
cosmetics
hw
1
updated
Oct 06, 2020
Move input signal connectors higher in schematic hierarchy
#9
· opened
Sep 21, 2020
by
Dimitris Lampridis
Schematic done
cosmetics
hw
1
updated
Oct 06, 2020
Top-level schematic is difficult to read
#8
· opened
Sep 21, 2020
by
Dimitris Lampridis
Schematic done
cosmetics
hw
1
updated
Oct 06, 2020
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