def WBGEN2_GEN_WRITE(value, offset, size):
	return (((value) & ((1<<(size))-1)) << (offset))



def SDO_INACTIVE(val):
	return WBGEN2_GEN_WRITE(val, 7, 1)
def LSB_FIRST(val):
	return WBGEN2_GEN_WRITE(val, 6, 1)
def SOFT_RESET(val):
	return WBGEN2_GEN_WRITE(val, 5, 1)
def LONG_INSTRUCTION(val):
	return WBGEN2_GEN_WRITE(val, 4, 1)
def A_COUNTER(val):
	return WBGEN2_GEN_WRITE(val, 0, 6)
def B_COUNTER_MSB(val):
	return WBGEN2_GEN_WRITE(val, 0, 5)
def B_COUNTER_LSB(val):
	return WBGEN2_GEN_WRITE(val, 0, 8)
def LOR_DEL(val):
	return WBGEN2_GEN_WRITE(val, 5, 2)
def LOR_EN(val):
	return WBGEN2_GEN_WRITE(val, 2, 1)
def PFD_POLARITY(val):
	return WBGEN2_GEN_WRITE(val, 6, 1)
def PLL_MUX_ON_STATUS(val):
	return WBGEN2_GEN_WRITE(val, 2, 4)
def CP_MODE(val):
	return WBGEN2_GEN_WRITE(val, 0, 2)
def CP_CURRENT(val):
	return WBGEN2_GEN_WRITE(val, 4, 3)
def RESET_R(val):
	return WBGEN2_GEN_WRITE(val, 2, 1)
def RESET_N(val):
	return WBGEN2_GEN_WRITE(val, 1, 1)
def RESET_ALL_CNTRS(val):
	return WBGEN2_GEN_WRITE(val, 0, 1)
def B_BYPASS(val):
	return WBGEN2_GEN_WRITE(val, 6, 1)
def PRESCALLER(val):
	return WBGEN2_GEN_WRITE(val, 2, 3)
def POWER_DOWN(val):
	return WBGEN2_GEN_WRITE(val, 0, 2)
def R_DIVIDER_MSB(val):
	return WBGEN2_GEN_WRITE(val, 0, 6)
def R_DIVIDER_LSB(val):
	return WBGEN2_GEN_WRITE(val, 0, 8)
def DIGIT_LOCK_DET_EN(val):
	return WBGEN2_GEN_WRITE(val, 6, 1)
def DIGIT_LOCK_DET_WND(val):
	return WBGEN2_GEN_WRITE(val, 5, 1)
def ANTIBACKSLASH_PLS_WDTH(val):
	return WBGEN2_GEN_WRITE(val, 0, 2)
def DEL_BYPASS(val):
	return WBGEN2_GEN_WRITE(val, 0, 1)
def RAMP_CAP(val):
	return WBGEN2_GEN_WRITE(val, 3, 3)
def RAMP_CURR(val):
	return WBGEN2_GEN_WRITE(val, 0, 3)
def FINE_DELAY(val):
	return WBGEN2_GEN_WRITE(val, 1, 5)
def OUTPUT_LEVEL(val):
	return WBGEN2_GEN_WRITE(val, 2, 2)
def CMOS_INV(val):
	return WBGEN2_GEN_WRITE(val, 4, 1)
def LOGIC_SEL(val):
	return WBGEN2_GEN_WRITE(val, 3, 1)
def CMOS_OUTPUT_LEVEL(val):
	return WBGEN2_GEN_WRITE(val, 1, 2)
def CMOS_OUTPUT_POWER(val):
	return WBGEN2_GEN_WRITE(val, 0, 1)
def CLKS_IN_PD(val):
	return WBGEN2_GEN_WRITE(val, 5, 1)
def REFIN_PD(val):
	return WBGEN2_GEN_WRITE(val, 4, 1)
def CLK_PLL_PD(val):
	return WBGEN2_GEN_WRITE(val, 3, 1)
def CLK2_PD(val):
	return WBGEN2_GEN_WRITE(val, 2, 1)
def CLK1_PD(val):
	return WBGEN2_GEN_WRITE(val, 1, 1)
def SEL_CLK_IN(val):
	return WBGEN2_GEN_WRITE(val, 0, 1)
def LOW_CYCLES(val):
	return WBGEN2_GEN_WRITE(val, 4, 4)
def HIGH_CYCLES(val):
	return WBGEN2_GEN_WRITE(val, 0, 4)
def BYPASS(val):
	return WBGEN2_GEN_WRITE(val, 7, 1)
def NO_SYNC(val):
	return WBGEN2_GEN_WRITE(val, 6, 1)
def FORCE(val):
	return WBGEN2_GEN_WRITE(val, 5, 1)
def START_HL(val):
	return WBGEN2_GEN_WRITE(val, 4, 1)
def PHASE_OFFSET(val):
	return WBGEN2_GEN_WRITE(val, 0, 4)
def SET_FUNCTION_PIN(val):
	return WBGEN2_GEN_WRITE(val, 5, 2)
def PD_SYNC(val):
	return WBGEN2_GEN_WRITE(val, 4, 1)
def PD_ALL_REF(val):
	return WBGEN2_GEN_WRITE(val, 3, 1)
def SYNC_REG(val):
	return WBGEN2_GEN_WRITE(val, 2, 1)
def SYNC_SELECT(val):
	return WBGEN2_GEN_WRITE(val, 1, 1)
def SYNC_ENABLE(val):
	return WBGEN2_GEN_WRITE(val, 0, 1)
def UPDATE_REGISTERS(val):
	return WBGEN2_GEN_WRITE(val, 0, 1)
