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FMC DIO 5ch TTL a
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FMC DIO 5ch TTL a
Commits
320f140c
Commit
320f140c
authored
Aug 28, 2019
by
Miguel Jimenez Lopez
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dio_ext_nic_etherbone: Improve header description.
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dio_ext_nic_etherbone_top.vhd
hdl/top/dio-ext-nic-etherbone/dio_ext_nic_etherbone_top.vhd
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hdl/top/dio-ext-nic-etherbone/dio_ext_nic_etherbone_top.vhd
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320f140c
...
@@ -6,13 +6,17 @@
...
@@ -6,13 +6,17 @@
-- Author : Grzegorz Daniluk, Rafael Rodriguez, Javier Daz, Miguel Jimenez
-- Author : Grzegorz Daniluk, Rafael Rodriguez, Javier Daz, Miguel Jimenez
-- Company : Elproma, Seven Solutions, UGR
-- Company : Elproma, Seven Solutions, UGR
-- Created : 2012-02-08
-- Created : 2012-02-08
-- Last update: 2019-08-2
7
-- Last update: 2019-08-2
8
-- Platform : FPGA-generics
-- Platform : FPGA-generics
-- Standard : VHDL
-- Standard : VHDL
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Description:
-- Description:
-- This design contains the old configuration for the WR-NIC project with DIO,
-- This design contains the old configuration for the WR-NIC project with DIO,
-- Etherbone and NIC capabilities.
-- Etherbone and NIC capabilities.
--
-- This file contains a legacy design that uses an old structure very similar
-- to wr-nic-v2.1 design. It remains in the git repository for historical and
-- traceability reasons.
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Copyright (c) 2012 Grzegorz Daniluk, Rafael Rodriguez, Javier Daz
-- Copyright (c) 2012 Grzegorz Daniluk, Rafael Rodriguez, Javier Daz
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
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