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AIDA-2020 TLU - Gateware
Commit b1027c62 authored by David Cussans's avatar David Cussans
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Updating TLU code to use IPBus v1.6 ( to avoid "code rot" )

parent 48e040c6
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AIDA_tlu/boards/enclustra_ax3_pm3/base_fw/synth/firmware/cfg/enclustra_ax3_pm3_a35.dep deleted 100644 → 0
View file @ 48e040c6
@device_family = "artix7"
@device_name = "xc7a35t"
@device_package = "csg324"
@device_speed = "-2"
@boardname = "enclustra_ax3_pm3"
setup settings_v7.tcl
# src top_enclustra_ax3_pm3.vhd
include enclustra_ax3_pm3_infra.dep
src -c ipbus-firmware:components/ipbus_core ipbus_package.vhd
src --cd ../ucf enclustra_ax3_pm3.tcl
AIDA_tlu/boards/enclustra_ax3_pm3/base_fw/synth/firmware/cfg/enclustra_ax3_pm3_infra.dep
View file @ b1027c62
......@@ -23,12 +23,15 @@
#
#-------------------------------------------------------------------------------
src enclustra_ax3_pm3_infra.vhd
src -c ipbus-firmware:components/ipbus_util clocks_7s_extphy_se.vhd ipbus_clock_div.vhd led_stretcher.vhd
include -c ipbus-firmware:components/ipbus_core
src --vhdl2008 enclustra_ax3_pm3_infra.vhd
src -c ipbus-firmware:components/ipbus_util clocks/clocks_7s_extphy_se.vhd ipbus_clock_div.vhd led_stretcher.vhd
src -c ipbus-firmware:components/ipbus_util masters/ipbus_ctrl.vhd
include -c ipbus-firmware:components/ipbus_transport_udp
# include -c ipbus-firmware:components/ipbus_core
include -c ipbus-firmware:components/ipbus_eth artix_rgmii.dep
# Include simulated Ethernet - even though the Generate statement will ensure it never gets used.
src -c ipbus-firmware:components/ipbus_eth ../sim/eth_mac_sim.vhd
src -c ipbus-firmware:components/modelsim_fli/eth ../sim/eth_mac_sim.vhd
src -c ipbus-firmware:components/ipbus_core ipbus_fabric_sel.vhd ipbus_package.vhd
AIDA_tlu/projects/TLU_v1e/firmware/cfg/enclustra_ax3_pm3_a35.dep
View file @ b1027c62
......@@ -5,12 +5,16 @@
@boardname = "enclustra_ax3_pm3"
setup settings_v7.tcl
# Top level file
src top_enclustra_tlu_v1e.vhd
#
include -c AIDA_tlu/boards/enclustra_ax3_pm3/base_fw/synth enclustra_ax3_pm3_infra.dep
src -c ipbus-firmware:components/ipbus_core ipbus_package.vhd
src -c ipbus-firmware:boards/enclustra_ax3_pm3/base_fw/synth --cd ../ucf enclustra_ax3_pm3.tcl
src -c ipbus-firmware:boards/enclustra_ax3_pm3/synth --cd ../ucf enclustra_ax3_pm3.tcl
#
src top_enclustra_tlu_v1e.vhd
# src --cd ../ucf enclustra_ax3_pm3.tcl
src --cd ../ucf I2C_constr.xdc
src --cd ../ucf TLU_enclustra_v1e.xdc
......
AIDA_tlu/projects/TLU_v1e/firmware/cfg/settings_v7.tcl
View file @ b1027c62
set obj [get_projects top]
set obj [get_projects TLU_1e]
set_property "default_lib" "xil_defaultlib" $obj
set_property "simulator_language" "Mixed" $obj
set_property "source_mgmt_mode" "DisplayOnly" $obj
......
AIDA_tlu/projects/sim/firmware/cfg/top_sim.dep
View file @ b1027c62
......@@ -35,9 +35,9 @@ src -c AIDA_tlu/projects/TLU_v1e top_enclustra_tlu_v1e.vhd
src -c AIDA_tlu/projects/sim --vhdl2008 infra_sim.vhd
src -c ipbus-firmware:components/ipbus_util clocks_7s_extphy_se.vhd led_stretcher.vhd ipbus_clock_div.vhd
src -c ipbus-firmware:components/ipbus_util clocks/clocks_7s_extphy_se.vhd led_stretcher.vhd ipbus_clock_div.vhd
src -c ipbus-firmware:components/ipbus_eth ../sim/eth_mac_sim.vhd
src -c ipbus-firmware:components/modelsim_fli/eth ../sim/eth_mac_sim.vhd
#
include -c AIDA_tlu/projects/TLU_v1e tlu_1e.dep
......
AIDA_tlu/scripts/build_tlu_firmware.sh
View file @ b1027c62
#!/bin/sh
# Put which branch of Git to use here...
IPBUS_BRANCH="-b v1.3"
IPBUS_BRANCH="-b v1.6"
TLU_BRANCH="-b 1e000024"
mkdir work
echo "Creating working directory"
[ -d work ] && echo "Directory Exists" || mkdir work
cd work
# IPBB_VERSION="0.3.13"
IPBB_VERSION="0.4.3"
curl -L https://github.com/ipbus/ipbb/archive/v${IPBB_VERSION}.tar.gz | tar xvz
IPBB_VERSION="0.5.2"
echo "Installing IPBB version ${IPBB_VERSION}"
[ -d ipbb-${IPBB_VERSION} ] && echo "ipbb-${IPBB_VERSION} already installed" || curl -L https://github.com/ipbus/ipbb/archive/v${IPBB_VERSION}.tar.gz | tar xvz
# ( or git clone git@github.com:ipbus/ipbb.git )
source ipbb-${IPBB_VERSION}/env.sh
......@@ -22,21 +23,18 @@ ipbb add git https://ohwr.org/project/fmc-mtlu-gw.git ${TLU_BRANCH}
# ipbb add git ssh://git@ohwr.org/fmc-projects/fmc-mtlu/fmc-mtlu-gw.git
# In order to generate the VHDL to decode the addresses follow the instructions at https://ipbus.web.cern.ch/ipbus/doc/user/html/firmware/hwDevInstructions.html
echo "Generating address table VHDL from XML file"
pushd src/fmc-mtlu-gw/AIDA_tlu/projects/TLU_v1e/addr_table
pwd
/opt/cactus/bin/uhal/tools/gen_ipbus_addr_decode -v TLUaddrmap.xml
#copy resulting file ( ipbus_decode_TLUaddrmap.vhd ) to work/build/src/fmc-mtlu-gw/AIDA_tlu/projects/TLU_v1e/firmware/hdl/
mv ipbus_decode_TLUaddrmap.vhd ../firmware/hdl/
popd
echo "BUILD: ipbb proj create"
ipbb proj create vivado TLU_1e fmc-mtlu-gw:AIDA_tlu/projects/TLU_v1e -t top_tlu_1e_a35.dep
cd proj/TLU_1e
echo "BUILD: creating VIVADO project"
ipbb vivado project
echo "BUILD: creating IPBus address decoder"
ipbb sim gendecoders
cp decoders/ipbus_decode_TLUaddrmap.vhd ../../src/fmc-mtlu-gw/AIDA_tlu/projects/TLU_v1e/firmware/hdl/ipbus_decode_TLUaddrmap.vhd
# Set TLU timing contraints *.xdc file to have "late" processing order
vivado -mode tcl -nojournal -nolog -notrace -source ../../src/fmc-mtlu-gw/AIDA_tlu/projects/TLU_v1e/firmware/ucf/TLU_enclustra_v1e_setProcessingOrder.tcl top/top.xpr
......
AIDA_tlu/scripts/simulate_tlu_firmware.sh
View file @ b1027c62
#!/bin/sh
# Put which branch of Git to use here...
IPBUS_BRANCH="-b v1.3"
TLU_BRANCH="-b 1e000022"
IPBUS_BRANCH="-b v1.6"
TLU_BRANCH="-b 1e000024"
mkdir work
echo "Creating working directory"
[ -d work ] && echo "Directory Exists" || mkdir work
cd work
# IPBB_VERSION="0.3.13"
IPBB_VERSION="0.4.3"
curl -L https://github.com/ipbus/ipbb/archive/v${IPBB_VERSION}.tar.gz | tar xvz
IPBB_VERSION="0.5.2"
echo "Installing IPBB version ${IPBB_VERSION}"
[ -d ipbb-${IPBB_VERSION} ] && echo "ipbb-${IPBB_VERSION} already installed" || curl -L https://github.com/ipbus/ipbb/archive/v${IPBB_VERSION}.tar.gz | tar xvz
# ( or git clone git@github.com:ipbus/ipbb.git )
source ipbb-${IPBB_VERSION}/env.sh
......@@ -22,18 +25,18 @@ ipbb add git https://ohwr.org/project/fmc-mtlu-gw.git ${TLU_BRANCH}
# ipbb add git ssh://git@ohwr.org/fmc-projects/fmc-mtlu/fmc-mtlu-gw.git
# In order to generate the VHDL to decode the addresses follow the instructions at https://ipbus.web.cern.ch/ipbus/doc/user/html/firmware/hwDevInstructions.html
echo "Generating address table VHDL from XML file"
pushd src/fmc-mtlu-gw/AIDA_tlu/projects/TLU_v1e/addr_table
pwd
/opt/cactus/bin/uhal/tools/gen_ipbus_addr_decode -v TLUaddrmap.xml
#copy resulting file ( ipbus_decode_TLUaddrmap.vhd ) to work/build/src/fmc-mtlu-gw/AIDA_tlu/projects/TLU_v1e/firmware/hdl/
mv ipbus_decode_TLUaddrmap.vhd ../firmware/hdl/
popd
echo "Creating project"
ipbb proj create sim TLU_1e_sim fmc-mtlu-gw:AIDA_tlu/projects/sim -t top_sim.dep
source /software/CAD/setup_mentor2019.sh
cd proj/TLU_1e_sim
# source /software/CAD/setup_mentor2019.sh
echo "Generating address table VHDL from XML file"
ipbb sim gendecoders
ipbb sim setup-simlib ipcores fli
......
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