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AIDA-2020 TLU - Gateware
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AIDA-2020 TLU - Gateware
Commits
e56fd3cd
Commit
e56fd3cd
authored
Jan 22, 2019
by
David Cussans
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Changed Patch file to reflect latest IPBus
Changed *.dep file to reflect change in repo layout
parent
f5c7ab6b
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2 changed files
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37 additions
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59 deletions
+37
-59
enclustra_ax3_pm3.patch
...x3_pm3/base_fw/synth/firmware/ucf/enclustra_ax3_pm3.patch
+0
-22
tlu_1e.dep
AIDA_tlu/projects/TLU_v1e/firmware/cfg/tlu_1e.dep
+37
-37
No files found.
AIDA_tlu/boards/enclustra_ax3_pm3/base_fw/synth/firmware/ucf/enclustra_ax3_pm3.patch
View file @
e56fd3cd
...
...
@@ -12,25 +12,3 @@
set_property SLEW SLOW [get_ports {leds[*]}]
set_property PACKAGE_PIN M16 [get_ports {leds[0]}]
set_property PACKAGE_PIN M17 [get_ports {leds[1]}]
@@ -43,13 +45,15 @@
set_property PACKAGE_PIN V16 [get_ports {rgmii_rxd[3]}]
set_property PACKAGE_PIN R16 [get_ports {rgmii_rx_ctl}]
set_property PACKAGE_PIN T14 [get_ports {rgmii_rxc}]
+
set_property PACKAGE_PIN M13 [get_ports {phy_rstn}]
false_path {phy_rstn} sysclk
-set_property IOSTANDARD LVCMOS25 [get_ports {cfg[*]}]
-set_property PULLUP TRUE [get_ports {cfg[*]}]
-set_property PACKAGE_PIN K2 [get_ports {cfg[0]}]
-set_property PACKAGE_PIN K1 [get_ports {cfg[1]}]
-set_property PACKAGE_PIN J4 [get_ports {cfg[2]}]
-set_property PACKAGE_PIN H4 [get_ports {cfg[3]}]
+
+#set_property IOSTANDARD LVCMOS25 [get_ports {cfg[*]}]
+#set_property PULLUP TRUE [get_ports {cfg[*]}]
+#set_property PACKAGE_PIN K2 [get_ports {cfg[0]}]
+#set_property PACKAGE_PIN K1 [get_ports {cfg[1]}]
+#set_property PACKAGE_PIN J4 [get_ports {cfg[2]}]
+#set_property PACKAGE_PIN H4 [get_ports {cfg[3]}]
AIDA_tlu/projects/TLU_v1e/firmware/cfg/tlu_1e.dep
View file @
e56fd3cd
...
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@@ -11,49 +11,49 @@ src -c ipbus-firmware:components/ipbus_core ipbus_fabric_sel.vhd
src -c ipbus-firmware:components/ipbus_slaves ipbus_reg_types.vhd
src -c components/tlu fmcTLU_pkg.vhd
src -c components/tlu fmcTLU_pkg_body.vhd
src -c components/tlu eventBuffer_rtl.vhd
src -c components/tlu logic_clocks_rtl.vhd
src -c components/tlu trigger/triggerInputs_newTLU_rtl.vhd
src -c components/tlu eventFormatter_rtl.vhd
src -c components/tlu T0_Shutter_Iface_rtl.vhd
src -c components/tlu SyncGenerator_rtl.vhd
src -c components/tlu counterWithResetPreset_rtl.vhd
src -c components/tlu counterDownGated_rtl.vhd
src -c components/tlu delayPulse4x_rtl.vhd
src -c components/tlu stretchPulse4x_rtl.vhd
src -c components/tlu dut/DUTInterfaces_rtl.vhd
src -c components/tlu dut/DUTInterface_AIDA_rtl.vhd
src -c components/tlu dut/DUTInterface_EUDET_rtl.vhd
src -c components/tlu trigger/triggerLogic_rtl.vhd
src -c components/tlu synchronizeRegisters_rtl.vhd
src -c components/tlu trigger/arrivalTimeLUT_rtl.vhd
src -c components/tlu counterWithReset_rtl.vhd
src -c components/tlu trigger/dualSERDES_1to4_rtl.vhd
src -c components/tlu trigger/IODELAYCal_FSM_rtl.vhd
src -c components/tlu pulseClockDomainCrossing_rtl.vhd
src -c components/tlu single_pulse_rtl.vhd
src -c components/tlu stretchPulse_rtl.vhd
src -c components/tlu coincidenceLogic_rtl.vhd
src -c
AIDA_tlu/
components/tlu fmcTLU_pkg.vhd
src -c
AIDA_tlu/
components/tlu fmcTLU_pkg_body.vhd
src -c
AIDA_tlu/
components/tlu eventBuffer_rtl.vhd
src -c
AIDA_tlu/
components/tlu logic_clocks_rtl.vhd
src -c
AIDA_tlu/
components/tlu trigger/triggerInputs_newTLU_rtl.vhd
src -c
AIDA_tlu/
components/tlu eventFormatter_rtl.vhd
src -c
AIDA_tlu/
components/tlu T0_Shutter_Iface_rtl.vhd
src -c
AIDA_tlu/
components/tlu SyncGenerator_rtl.vhd
src -c
AIDA_tlu/
components/tlu counterWithResetPreset_rtl.vhd
src -c
AIDA_tlu/
components/tlu counterDownGated_rtl.vhd
src -c
AIDA_tlu/
components/tlu delayPulse4x_rtl.vhd
src -c
AIDA_tlu/
components/tlu stretchPulse4x_rtl.vhd
src -c
AIDA_tlu/
components/tlu dut/DUTInterfaces_rtl.vhd
src -c
AIDA_tlu/
components/tlu dut/DUTInterface_AIDA_rtl.vhd
src -c
AIDA_tlu/
components/tlu dut/DUTInterface_EUDET_rtl.vhd
src -c
AIDA_tlu/
components/tlu trigger/triggerLogic_rtl.vhd
src -c
AIDA_tlu/
components/tlu synchronizeRegisters_rtl.vhd
src -c
AIDA_tlu/
components/tlu trigger/arrivalTimeLUT_rtl.vhd
src -c
AIDA_tlu/
components/tlu counterWithReset_rtl.vhd
src -c
AIDA_tlu/
components/tlu trigger/dualSERDES_1to4_rtl.vhd
src -c
AIDA_tlu/
components/tlu trigger/IODELAYCal_FSM_rtl.vhd
src -c
AIDA_tlu/
components/tlu pulseClockDomainCrossing_rtl.vhd
src -c
AIDA_tlu/
components/tlu single_pulse_rtl.vhd
src -c
AIDA_tlu/
components/tlu stretchPulse_rtl.vhd
src -c
AIDA_tlu/
components/tlu coincidenceLogic_rtl.vhd
# IPBus address map generated from XML file
src -c projects/TLU_v1e ipbus_decode_TLUaddrmap.vhd
src -c
AIDA_tlu/
projects/TLU_v1e ipbus_decode_TLUaddrmap.vhd
# Include I2C components
src -c components/external/opencores_i2c i2c_master_top.vhd
src -c components/external/opencores_i2c i2c_master_bit_ctrl.vhd
src -c components/external/opencores_i2c i2c_master_byte_ctrl.vhd
src -c components/external/opencores_i2c i2c_master_registers.vhd
src -c components/external/opencores_i2c i2c_master_rtl.vhd
# Include I2C
AIDA_tlu/
components
src -c
AIDA_tlu/
components/external/opencores_i2c i2c_master_top.vhd
src -c
AIDA_tlu/
components/external/opencores_i2c i2c_master_bit_ctrl.vhd
src -c
AIDA_tlu/
components/external/opencores_i2c i2c_master_byte_ctrl.vhd
src -c
AIDA_tlu/
components/external/opencores_i2c i2c_master_registers.vhd
src -c
AIDA_tlu/
components/external/opencores_i2c i2c_master_rtl.vhd
# Inclide IP ( *.xci files )
src -c components/tlu --cd ../cgn tlu_event_fifo.xci
src -c components/tlu --cd ../cgn internalTriggerGenerator.xci
src -c
AIDA_tlu/
components/tlu --cd ../cgn tlu_event_fifo.xci
src -c
AIDA_tlu/
components/tlu --cd ../cgn internalTriggerGenerator.xci
...
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