Skip to content

A
AIDA-2020 TLU - Hardware
Commit 387b8da7 authored by David Cussans's avatar David Cussans
Browse files
Options

Copied fmc_tlu_toplevel_a to fmc_tlu_toplevel_c

parent 3c2717e9
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 1157577 additions and 6006 deletions
Cadence/copyproject.log
View file @ 387b8da7
INFO(COPYPROJ-87): Compiling a list of read-only files.
SUCCESS(COPYPROJ-88): Read-only files list compiled successfully.
INFO(COPYPROJ-81): Executing csnetlister -proj fmc_tlu_hdmi_lvds_adaptor.cpm.
INFO(COPYPROJ-81): Executing csnetlister -proj fmc_tlu_v1a.cpm.
SUCCESS(COPYPROJ-83): Successfully executed csnetlister.
Source Info :
=============
Project : /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/circuit_board/Cadence/fmc_tlu_hdmi_lvds_adaptor.cpm
Project : /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/circuit_board/Cadence/fmc_tlu_v1a.cpm
Library : fmc_tlu_v1_lib
Design : fmc_tlu_hdmi_lvds_adaptor
Design : fmc_tlu_toplevel_b
Destination Info :
==================
Project : /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/circuit_board/Cadence/fmc_tlu_hdmi_rj45_lvds_adaptor_v2.cpm
Project : /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/circuit_board/Cadence/fmc_tlu_v1c.cpm
Library : fmc_tlu_v1_lib
Design : fmc_tlu_hdmi_rj45_lvds_adaptor_v2
Design : fmc_tlu_toplevel_c
INFO(COPYPROJ-17): Copying old design hierarchy.
SUCCESS(COPYPROJ-18): Copied old design hierarchy.
......@@ -21,7 +21,9 @@ SUCCESS(COPYPROJ-45): Variants view updated successfully.
INFO(COPYPROJ-64): Updating design data.
SUCCESS(COPYPROJ-65): Design data updated successfully.
SUCCESS(COPYPROJ-48): Pxl state file in packaged view updated successfully.
INFO(COPYPROJ-84): Executing nconcepthdl -proj "fmc_tlu_hdmi_rj45_lvds_adaptor_v2.cpm" -scr "./cp_script.scr" -log "./cp_log.log" -ignoreprojscr.
INFO(COPYPROJ-40): Updating opf view.
SUCCESS(COPYPROJ-41): Opf view updated successfully.
INFO(COPYPROJ-84): Executing nconcepthdl -proj "fmc_tlu_v1c.cpm" -scr "./cp_script.scr" -log "./cp_log.log" -ignoreprojscr.
SUCCESS(COPYPROJ-86): Successfully executed nconcepthdl.
INFO(COPYPROJ-91): Starting to set back the read-only flag.
SUCCESS(COPYPROJ-92): Read-only flag set successfully for all files.
......
Cadence/fmc_tlu_v1c.cpm 0 → 100644
View file @ 387b8da7
{ Machine generated file created by SPI }
{ Last modified was 14:45:25 Thursday, April 21, 2016 }
{ NOTE: Do not modify the contents of this file. If this is regenerated by }
{ SPI, your modifications will be overwritten. }
START_GLOBAL
view_pcb './worklib/fmc_tlu_toplevel_c/physical'
design_name 'fmc_tlu_toplevel_c'
design_library 'fmc_tlu_v1_lib'
library 'fmc_tlu_v1_lib' 'bris_cds_analogue' 'bris_cds_connectors' 'bris_cds_logic' 'bris_cds_memory' 'bris_cds_special' 'bris_cds_standard' 'bris_cds_switches' 'cnconnector' 'cninterface' 'cnpower' 'cnlinear' 'cnpassive' 'cndiscrete' 'standard' 'cds_analogue' 'cn100e' 'cn74lv' 'cn74tiac' 'cn75als' 'cncmos' 'cnfast' 'cnmemory' 'uob_hep_pc036a_lib' 'cds_connectors' 'cds_special'
temp_dir 'temp'
cpm_version '16.3'
ppt '$BRIS_CDSLIB/cds_analogue/cds_analogue.ptf' '$BRIS_CDSLIB/cds_connectors/cds_connectors.ptf' '$BRIS_CDSLIB/cds_logic/cds_logic.ptf' '$BRIS_CDSLIB/cds_pld/cds_pld.ptf' '$BRIS_CDSLIB/cds_special/cds_special.ptf' '$CERN_CDSLIB/lib_psd16.x/concept_libs/pe16/pe_cern_lib/parttables/cnconnector.ptf' '$CERN_CDSLIB/lib_psd16.x/concept_libs/pe16/pe_cern_lib/parttables/cndiscrete.ptf' '$CERN_CDSLIB/lib_psd16.x/concept_libs/pe16/pe_cern_lib/parttables/cnpassive.ptf'
cdsprop_file ''
physical_path './worklib/fmc_tlu_toplevel_c/physical'
trapezoidal_angle_in_degree '90.000000'
session_name 'ProjectMgr8446'
END_GLOBAL
START_CONCEPTHDL
LOGIC_GRID_TOGGLE 'ON'
LOGIC_GRID_SIZE '0.0500'
SYMBOL_GRID_TOGGLE 'ON'
DOC_GRID_TOGGLE 'ON'
DOC_GRID_SIZE '0.0500'
CHECK_VOLTAGE_ON_HDL 'OFF'
PLOT_FIT_TO_PAGE 'ON'
PAPER_SIZE '9'
PAPER_ORIENTATION '2'
PAPER_SOURCE '15'
WPLOTTER_NAME 'Generic PostScript Printer'
PLOTTER_FACILITY 'DEVICE'
PLOT_EDGE_TO_EDGE 'ON'
END_CONCEPTHDL
START_PKGRXL
regenerate_physical_net_name 'OFF'
electrical_constraints 'ON'
overwrite_constraints 'OFF'
GEN_SUBDESIGN
force_subdesign 'fmc_tlu_cfd' 'fmc_tlu_vsupply5v'
END_PKGRXL
START_DESIGNSYNC
replace_symbol '0'
etch_removal 'NO'
ignore_fixed 'NO'
create_user_prop 'NO'
run_packager 'YES'
run_netrev 'YES'
backannotate_forward 'NO'
last_board_file 'fmc_tlu_v1a_66_gloss4a.brd'
run_feedback 'YES'
run_genfeedformat 'YES'
backannotate_feedback 'NO'
END_DESIGNSYNC
START_BOMHDL
last_output_file './worklib/fmc_tlu_toplevel_b/bom/fmc_tlu_v1a.csv'
last_template_file '/projects/HEP_Instrumentation/cad/tools/cadence_templates/spreadsheet-format.bom'
last_standard_option '1'
last_what_to_output '0'
last_variant_file ''
last_ss_delimiter 'Colon :'
use_filters '0'
last_callout_file ''
last_variant ''
END_BOMHDL
START_PDF
CURRENTPDFVIEWER '0'
CURRENTPDFVIEWERPATH 'Default'
END_PDF
START_CONSTRAINT_MGR
EDIT_PHYSICAL_SPACING_CONSTRAINTS 'ON'
END_CONSTRAINT_MGR
Cadence/worklib/fmc_tlu_cfd/sch_1/page1.csa
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_cfd/sch_1/page1.csv
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_diode_clamp/sch_1/fmc_tlu_diode_clamp.dcf
View file @ 387b8da7
......@@ -4,10 +4,10 @@
( logical )
)
( version
( 16.5 )
( 16.6 )
)
( revisionNumber
( logicalViewRevNum 14 )
( logicalViewRevNum 15 )
( physicalViewRevNum 0 )
( otherViewRevNum 0 )
)
......@@ -482,6 +482,54 @@
( Analysis
)
)
( Attribute
( Name "IC" )
( Description " " )
( Value
( DataType ( dString ) )
( Status sProperty sPackage )
)
( Objects
( ValidObjects oGate oGateDefn oBlock oPart oDesign oSystem oPartDefn )
( NoInherit
( oGate oPin )
)
)
( Analysis
)
)
( Attribute
( Name "KNEE" )
( Description " " )
( Value
( DataType ( dString ) )
( Status sProperty sPackage )
)
( Objects
( ValidObjects oGate oGateDefn oBlock oPart oDesign oSystem oPartDefn )
( NoInherit
( oGate oPin )
)
)
( Analysis
)
)
( Attribute
( Name "TC" )
( Description " " )
( Value
( DataType ( dString ) )
( Status sProperty sPackage )
)
( Objects
( ValidObjects oGate oGateDefn oBlock oPart oDesign oSystem oPartDefn )
( NoInherit
( oGate oPin )
)
)
( Analysis
)
)
)
( designConstraints
( ruleChanges
......@@ -564,40 +612,15 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I9" )
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i11"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
( pin "a(0)"
( attribute "PN" "#"
( Origin gPackager )
)
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i13"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i15"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i17"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i19"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i21"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i23"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
( pin "b(0)"
( attribute "PN" "#"
( Origin gPackager )
)
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i7"
......@@ -632,40 +655,7 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I7" )
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i40"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i39"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i38"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i37"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i36"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i35"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i34"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i43"
......@@ -700,6 +690,8 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I43" )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i44"
( attribute "CDS_LIB" "bris_cds_analogue"
......@@ -733,6 +725,8 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I44" )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i45"
( attribute "CDS_LIB" "bris_cds_analogue"
......@@ -766,6 +760,8 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I45" )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i46"
( attribute "CDS_LIB" "bris_cds_analogue"
......@@ -799,6 +795,8 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I46" )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i47"
( attribute "CDS_LIB" "bris_cds_analogue"
......@@ -832,6 +830,8 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I47" )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i48"
( attribute "CDS_LIB" "bris_cds_analogue"
......@@ -865,10 +865,7 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I48" )
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i49"
( attribute "CHIPS_PART_NAME" "PRTR5V0U8S"
( Origin gPackager )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i50"
......@@ -903,6 +900,8 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I50" )
( pin "\in\"
)
)
( gate "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i51"
( attribute "CDS_LIB" "cndiscrete"
......@@ -933,37 +932,11 @@
( Origin gPackager )
)
( objectStatus "PAGE1_I51" )
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i50:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i9:b(0)"
( attribute "PN" "#"
( Origin gPackager )
( pin "a(0)"
)
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i9:a(0)"
( attribute "PN" "#"
( Origin gPackager )
( pin "k(0)"
)
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i7:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i43:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i44:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i45:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i46:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i47:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i48:\in\"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i51:a(0)"
)
( pin "@fmc_tlu_v1_lib.fmc_tlu_diode_clamp(sch_1):page1_i51:k(0)"
)
)
)
)
Cadence/worklib/fmc_tlu_diode_clamp/sch_1/page1.csa
View file @ 387b8da7
......@@ -303,14 +303,6 @@ DISPLAY INVISIBLE (4400 250);
FORCEADD PRTR5V0U8S..1
R 3
(350 -2750);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -2450);
FORCEPROP 0 LASTPIN (250 -2750) $PN <<OCC_ONLY>>
J 2
(240 -2740);
DISPLAY 0.808511 (240 -2740);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -2550);
......@@ -327,6 +319,14 @@ FORCEPROP 2 LAST PATH I43
J 0
(600 -2500);
DISPLAY 1.021277 (600 -2500);
FORCEPROP 0 LASTPIN (250 -2750) $PN <<OCC_ONLY>>
J 2
(240 -2740);
DISPLAY 0.808511 (240 -2740);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -2450);
FORCEPROP 2 LAST CDS_LIB bris_cds_analogue
J 0
(350 -2750);
......@@ -341,14 +341,6 @@ DISPLAY INVISIBLE (350 -2750);
FORCEADD PRTR5V0U8S..1
R 3
(350 -2200);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -1900);
FORCEPROP 0 LASTPIN (250 -2200) $PN <<OCC_ONLY>>
J 2
(240 -2190);
DISPLAY 0.808511 (240 -2190);
FORCEPROP 2 LAST MANUF NXP
J 0
(600 -2100);
......@@ -357,14 +349,22 @@ FORCEPROP 2 LAST PACK_TYPE TSSOP
J 0
(600 -2150);
DISPLAY 1.021277 (600 -2150);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -2000);
DISPLAY 1.021277 (600 -2000);
FORCEPROP 2 LAST PATH I44
J 0
(600 -1950);
DISPLAY 1.021277 (600 -1950);
FORCEPROP 0 LASTPIN (250 -2200) $PN <<OCC_ONLY>>
J 2
(240 -2190);
DISPLAY 0.808511 (240 -2190);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -1900);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -2000);
DISPLAY 1.021277 (600 -2000);
FORCEPROP 1 LAST CDS_LMAN_SYM_OUTLINE -125,50,125,-50
R 1
J 2
......@@ -379,18 +379,6 @@ DISPLAY INVISIBLE (350 -2200);
FORCEADD PRTR5V0U8S..1
R 3
(350 -1650);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -1350);
FORCEPROP 0 LASTPIN (250 -1650) $PN <<OCC_ONLY>>
J 2
(240 -1640);
DISPLAY 0.808511 (240 -1640);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -1450);
DISPLAY 1.021277 (600 -1450);
FORCEPROP 2 LAST PATH I45
J 0
(600 -1400);
......@@ -403,6 +391,18 @@ FORCEPROP 2 LAST PACK_TYPE TSSOP
J 0
(600 -1600);
DISPLAY 1.021277 (600 -1600);
FORCEPROP 0 LASTPIN (250 -1650) $PN <<OCC_ONLY>>
J 2
(240 -1640);
DISPLAY 0.808511 (240 -1640);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -1350);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -1450);
DISPLAY 1.021277 (600 -1450);
FORCEPROP 1 LAST CDS_LMAN_SYM_OUTLINE -125,50,125,-50
R 1
J 2
......@@ -417,18 +417,6 @@ DISPLAY INVISIBLE (350 -1650);
FORCEADD PRTR5V0U8S..1
R 3
(350 -1100);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -800);
FORCEPROP 0 LASTPIN (250 -1100) $PN <<OCC_ONLY>>
J 2
(240 -1090);
DISPLAY 0.808511 (240 -1090);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -900);
DISPLAY 1.021277 (600 -900);
FORCEPROP 2 LAST PATH I46
J 0
(600 -850);
......@@ -441,6 +429,18 @@ FORCEPROP 2 LAST PACK_TYPE TSSOP
J 0
(600 -1050);
DISPLAY 1.021277 (600 -1050);
FORCEPROP 0 LASTPIN (250 -1100) $PN <<OCC_ONLY>>
J 2
(240 -1090);
DISPLAY 0.808511 (240 -1090);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -800);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -900);
DISPLAY 1.021277 (600 -900);
FORCEPROP 1 LAST CDS_LMAN_SYM_OUTLINE -125,50,125,-50
R 1
J 2
......@@ -455,14 +455,22 @@ DISPLAY INVISIBLE (350 -1100);
FORCEADD PRTR5V0U8S..1
R 3
(350 -550);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -250);
FORCEPROP 0 LASTPIN (250 -550) $PN <<OCC_ONLY>>
J 2
(240 -540);
DISPLAY 0.808511 (240 -540);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -250);
FORCEPROP 2 LAST PACK_TYPE TSSOP
J 0
(600 -500);
DISPLAY 1.021277 (600 -500);
FORCEPROP 2 LAST MANUF NXP
J 0
(600 -450);
DISPLAY 1.021277 (600 -450);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -350);
......@@ -471,14 +479,6 @@ FORCEPROP 2 LAST PATH I47
J 0
(600 -300);
DISPLAY 1.021277 (600 -300);
FORCEPROP 2 LAST MANUF NXP
J 0
(600 -450);
DISPLAY 1.021277 (600 -450);
FORCEPROP 2 LAST PACK_TYPE TSSOP
J 0
(600 -500);
DISPLAY 1.021277 (600 -500);
FORCEPROP 1 LAST CDS_LMAN_SYM_OUTLINE -125,50,125,-50
R 1
J 2
......@@ -493,18 +493,6 @@ DISPLAY INVISIBLE (350 -550);
FORCEADD PRTR5V0U8S..1
R 3
(350 0);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 300);
FORCEPROP 0 LASTPIN (250 0) $PN <<OCC_ONLY>>
J 2
(240 10);
DISPLAY 0.808511 (240 10);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 200);
DISPLAY 1.021277 (600 200);
FORCEPROP 2 LAST PATH I48
J 0
(600 250);
......@@ -517,6 +505,18 @@ FORCEPROP 2 LAST PACK_TYPE TSSOP
J 0
(600 50);
DISPLAY 1.021277 (600 50);
FORCEPROP 0 LASTPIN (250 0) $PN <<OCC_ONLY>>
J 2
(240 10);
DISPLAY 0.808511 (240 10);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 300);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 200);
DISPLAY 1.021277 (600 200);
FORCEPROP 1 LAST CDS_LMAN_SYM_OUTLINE -125,50,125,-50
R 1
J 2
......@@ -531,14 +531,6 @@ DISPLAY INVISIBLE (350 0);
FORCEADD PRTR5V0U8S..1
R 1
(350 -3300);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -3000);
FORCEPROP 0 LASTPIN (250 -3300) $PN <<OCC_ONLY>>
J 2
(240 -3290);
DISPLAY 0.808511 (240 -3290);
FORCEPROP 2 LAST MANUF NXP
J 0
(600 -3150);
......@@ -555,6 +547,14 @@ FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 -3050);
DISPLAY 1.021277 (600 -3050);
FORCEPROP 0 LASTPIN (250 -3300) $PN <<OCC_ONLY>>
J 2
(240 -3290);
DISPLAY 0.808511 (240 -3290);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 -3000);
FORCEPROP 1 LAST CDS_LMAN_SYM_OUTLINE -125,50,125,-50
R 1
J 0
......@@ -568,42 +568,34 @@ J 0
DISPLAY INVISIBLE (350 -3300);
FORCEADD ZENER..1
(4800 500);
FORCEPROP 1 LAST $LOCATION ZD?
J 2
(5017 512);
DISPLAY 0.723404 (5017 512);
PAINT WHITE (5017 512);
FORCEPROP 1 LAST TYPE BZT52C2V7
J 2
(5215 445);
DISPLAY 0.723404 (5215 445);
PAINT WHITE (5215 445);
FORCEPROP 1 LAST PACK_TYPE SOD123-CA
FORCEPROP 1 LAST $LOCATION ZD?
J 2
(5017 512);
DISPLAY 0.723404 (5017 512);
PAINT WHITE (5017 512);
FORCEPROP 1 LAST PATH I51
J 0
(4840 495);
DISPLAY 0.723404 (4840 495);
PAINT WHITE (4840 495);
DISPLAY INVISIBLE (4840 495);
(4825 825);
DISPLAY 0.723404 (4825 825);
DISPLAY INVISIBLE (4825 825);
FORCEPROP 2 LAST CDS_LIB cndiscrete
J 0
(4800 500);
DISPLAY INVISIBLE (4800 500);
FORCEPROP 1 LAST PATH I51
FORCEPROP 1 LAST PACK_TYPE SOD123-CA
J 0
(4825 825);
DISPLAY 0.723404 (4825 825);
DISPLAY INVISIBLE (4825 825);
(4840 495);
DISPLAY 0.723404 (4840 495);
PAINT WHITE (4840 495);
DISPLAY INVISIBLE (4840 495);
FORCEADD PRTR5V0U8S..1
R 3
(350 550);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 800);
FORCEPROP 0 LASTPIN (250 550) $PN <<OCC_ONLY>>
J 2
(240 560);
DISPLAY 0.808511 (240 560);
FORCEPROP 0 LAST POWER_GROUP VCC=P2V5;GND=GND_SIGNAL
J 0
(600 750);
......@@ -620,6 +612,14 @@ FORCEPROP 2 LAST PATH I7
J 0
(600 550);
DISPLAY 1.021277 (600 550);
FORCEPROP 0 LASTPIN (250 550) $PN <<OCC_ONLY>>
J 2
(240 560);
DISPLAY 0.808511 (240 560);
FORCEPROP 0 LAST $LOCATION <<OCC_ONLY>>
R 1
J 0
(600 800);
FORCEPROP 2 LAST CDS_LIB bris_cds_analogue
J 0
(350 550);
......@@ -634,23 +634,6 @@ DISPLAY INVISIBLE (350 550);
FORCEADD CAPCERSMDCL2..1
R 1
(4450 500);
FORCEPROP 1 LAST $LOCATION C?
R 1
J 0
(4400 475);
DISPLAY 0.723404 (4400 475);
FORCEPROP 1 LASTPIN (4450 600) $PN #
R 1
J 0
(4425 600);
DISPLAY 0.723404 (4425 600);
DISPLAY INVISIBLE (4425 600);
FORCEPROP 1 LASTPIN (4450 400) $PN #
R 1
J 2
(4425 400);
DISPLAY 0.723404 (4425 400);
DISPLAY INVISIBLE (4425 400);
FORCEPROP 1 LAST VALUE 100NF
R 1
J 1
......@@ -661,6 +644,11 @@ R 1
J 1
(4600 500);
DISPLAY 0.723404 (4600 500);
FORCEPROP 1 LAST $LOCATION C?
R 1
J 0
(4400 475);
DISPLAY 0.723404 (4400 475);
FORCEPROP 1 LAST SIZE 1
R 1
J 0
......@@ -684,31 +672,48 @@ J 1
(4650 500);
DISPLAY 0.723404 (4650 500);
DISPLAY INVISIBLE (4650 500);
FORCEPROP 1 LASTPIN (4450 400) $PN #
R 1
J 2
(4425 400);
DISPLAY 0.723404 (4425 400);
DISPLAY INVISIBLE (4425 400);
FORCEPROP 1 LASTPIN (4450 600) $PN #
R 1
J 0
(4425 600);
DISPLAY 0.723404 (4425 600);
DISPLAY INVISIBLE (4425 600);
FORCEADD A3-2000..1
(1500 350);
FORCEPROP 0 LAST CDS_CON_LAST_MODIFIED Wed Sep 18 16:18:42 2013
FORCEPROP 0 LAST CDS_CON_LAST_MODIFIED Thu Apr 21 14:46:17 2016
J 0
(3250 -2450);
DISPLAY INVISIBLE (3250 -2450);
FORCEPROP 1 LAST CUSTOM_TXT_CDS <CON_LAST_MODIFIED>
J 0
(3250 -2450);
PAINT GREEN (3250 -2450);
FORCEPROP 1 LAST CUSTOM_TXT_CDS OVERALL PAGE: <CURRENT_DESIGN_SHEET> OF <TOTAL_DESIGN_SHEETS>
J 0
(4875 -3850);
DISPLAY 1.255319 (4875 -3850);
PAINT GREEN (4875 -3850);
FORCEPROP 1 LAST CUSTOM_TXT_CDS MODULE PAGE: <CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
J 0
(4925 -3750);
DISPLAY 1.255319 (4925 -3750);
PAINT GREEN (4925 -3750);
FORCEPROP 1 LAST CUSTOM_TXT_CDS <CON_DESIGN_LIB>
J 0
(3350 -3225);
DISPLAY 1.978723 (3350 -3225);
PAINT GREEN (3350 -3225);
FORCEPROP 1 LAST CUSTOM_TXT_CDS MODULE: <CON_DESIGN_NAME>
J 0
(2900 -3350);
DISPLAY 1.255319 (2900 -3350);
PAINT GREEN (2900 -3350);
FORCEPROP 2 LAST CDS_LIB bris_cds_standard
J 0
(1500 350);
......@@ -722,10 +727,10 @@ DISPLAY INVISIBLE (6300 -5625);
WIRE 16 -1 (4450 675)(4450 800);
WIRE 16 -1 (4800 675)(4450 675);
WIRE 16 -1 (4450 600)(4450 675);
WIRE 16 -1 (4800 550)(4800 675);
WIRE 16 -1 (4450 325)(4450 250);
WIRE 16 -1 (4800 325)(4450 325);
WIRE 16 -1 (4450 400)(4450 325);
WIRE 16 -1 (4800 550)(4800 675);
WIRE 16 -1 (4800 450)(4800 325);
WIRE 16 -1 (250 550)(-800 550);
FORCEPROP 2 LAST SIG_NAME SIG0
......@@ -767,16 +772,16 @@ FORCEPROP 2 LAST SIG_NAME SIG6
J 0
(-660 -2740);
DISPLAY 1.021277 (-660 -2740);
DOT 1 (4450 325);
DOT 1 (4450 675);
FORCENOTE
LICENSED UNDER THE TAPR OPEN HARDWARE LICENSE (WWW.TAPR.ORG/OHL)
(4100 -3600) 0;
DISPLAY LEFT (4100 -3600);
DISPLAY 0.808511 (4100 -3600);
DOT 1 (4450 325);
FORCENOTE
11
(6200 -2850) 0;
DISPLAY LEFT (6200 -2850);
DISPLAY 1.021277 (6200 -2850);
FORCENOTE
LICENSED UNDER THE TAPR OPEN HARDWARE LICENSE (WWW.TAPR.ORG/OHL)
(4100 -3600) 0;
DISPLAY LEFT (4100 -3600);
DISPLAY 0.808511 (4100 -3600);
QUIT
Cadence/worklib/fmc_tlu_diode_clamp/sch_1/page1.csv
View file @ 387b8da7
FILE_TYPE = CONNECTIVITY;
{Allegro Design Entry HDL 16.5-S029 (v16-5-13BU) 8/27/2012}
{Allegro Design Entry HDL 16.6-S055 (v16-6-112EN) 8/10/2015}
"PAGE_NUMBER" = 1;
0"NC";
1"P2V5\g";
......@@ -113,36 +113,36 @@ CDS_LIB"bris_cds_analogue";
%"PRTR5V0U8S"
"1","(350,-1650)","3","bris_cds_analogue","I45";
;
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
MANUF"NXP"
PACK_TYPE"TSSOP"
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
CDS_LMAN_SYM_OUTLINE"-125,50,125,-50"
CDS_LIB"bris_cds_analogue";
"IN"5;
%"PRTR5V0U8S"
"1","(350,-1100)","3","bris_cds_analogue","I46";
;
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
MANUF"NXP"
PACK_TYPE"TSSOP"
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
CDS_LMAN_SYM_OUTLINE"-125,50,125,-50"
CDS_LIB"bris_cds_analogue";
"IN"8;
%"PRTR5V0U8S"
"1","(350,-550)","3","bris_cds_analogue","I47";
;
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
MANUF"NXP"
PACK_TYPE"TSSOP"
MANUF"NXP"
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
CDS_LMAN_SYM_OUTLINE"-125,50,125,-50"
CDS_LIB"bris_cds_analogue";
"IN"7;
%"PRTR5V0U8S"
"1","(350,0)","3","bris_cds_analogue","I48";
;
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
MANUF"NXP"
PACK_TYPE"TSSOP"
POWER_GROUP"VCC=P2V5;GND=GND_SIGNAL"
CDS_LMAN_SYM_OUTLINE"-125,50,125,-50"
CDS_LIB"bris_cds_analogue";
"IN"6;
......@@ -158,10 +158,10 @@ CDS_LIB"bris_cds_analogue";
%"ZENER"
"1","(4800,500)","0","cndiscrete","I51";
;
$LOCATION"ZD?"
TYPE"BZT52C2V7"
PACK_TYPE"SOD123-CA"
CDS_LIB"cndiscrete";
$LOCATION"ZD?"
CDS_LIB"cndiscrete"
PACK_TYPE"SOD123-CA";
"K <SIZE-1..0>\NAC"1;
"A <SIZE-1..0>\NAC"2;
%"PRTR5V0U8S"
......@@ -176,9 +176,9 @@ CDS_LMAN_SYM_OUTLINE"-125,50,125,-50";
%"CAPCERSMDCL2"
"1","(4450,500)","1","cnpassive","I9";
;
$LOCATION"C?"
VALUE"100NF"
VOLTAGE"16V"
$LOCATION"C?"
SIZE"1"
CDS_LIB"cnpassive"
PACK_TYPE"0603";
......
Cadence/worklib/fmc_tlu_toplevel_c/cfg_package/expand.cfg 0 → 100755
View file @ 387b8da7
config fmc_tlu_toplevel_c;
design fmc_tlu_v1_lib.fmc_tlu_toplevel_c:sch_1;
liblist fmc_tlu_v1_lib, bris_cds_analogue, bris_cds_connectors, bris_cds_logic, bris_cds_memory, bris_cds_special, bris_cds_standard, bris_cds_switches, cnconnector, cninterface, cnpower, cnlinear, cnpassive, cndiscrete, standard, cds_analogue, cn100e, cn74lv, cn74tiac, cn75als, cncmos, cnfast, cnmemory, uob_hep_pc036a_lib, cds_connectors, cds_special;
viewlist chips, pic_1, picopt_1, sch_1, schematic, entity, functional;
stoplist chips;
endconfig
Cadence/worklib/fmc_tlu_toplevel_c/opf/master.tag 0 → 100755
View file @ 387b8da7
props.opf
\ No newline at end of file
Cadence/worklib/fmc_tlu_toplevel_c/packaged/pxl.state 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/.rtcomp 0 → 100644
View file @ 387b8da7
Total: 702 Missing: 8
Total etch: 267.73
Total vias: 433
Total: 702 Missing: 8
Total etch: 268.63
Total vias: 433
Total: 702 Missing: 8
Total etch: 267.61
Total vias: 433
Cadence/worklib/fmc_tlu_toplevel_c/physical/README 0 → 100755
View file @ 387b8da7
fmc_tlu_v1a
These file describes PCB fabrication and assembly details of a
FMC based "mini TLU" for the AIDA project.
contact: David.Cussans@bristol.ac.uk
tel: 0117 95 46879
0117 33 17199
fax: 0117 925 5624
S.J.Nash@bristol.ac.uk
tel: 0117 928 7927
Files produced by Cadence Allegro PE16.5
Artwork:
--------
Format: Gerber RS-274X , parameters described in art_param.txt.
All layers viewed from top
Build:
------
Six Layers as follows:
fmc_tlu_v1a_66_L01P.ger
fmc_tlu_v1a_66_L02P.ger
fmc_tlu_v1a_66_L03P.ger
fmc_tlu_v1a_66_L04P.ger
fmc_tlu_v1a_66_L05P.ger
fmc_tlu_v1a_66_L06P.ger
Suggested build (1.6mm total thickness)
1-2 0.22 mm
2-3 0.30 mm
3-4 0.22 mm
4-5 0.30 mm
5-6 0.22 mm
FR4 or similar laminate
35um copper on outers ( after plating )
18um copper on inners
Solder Masks
------------
fmc_tlu_v1a_66_LSM1.ger
fmc_tlu_v1a_66_LSM2.ger
Colour not critical, suggest green. Photo-imagable.
Solderpaste mask
-----------------
fmc_tlu_v1a_66_SMD1.ger
fmc_tlu_v1a_66_SMD2.ger
Silk screen
-----------
fmc_tlu_v1a_66_POS1.ger
fmc_tlu_v1a_66_POS2.ger
Colour not critical, suggest white.
Assembly Diagram
-----------------
fmc_tlu_v1a_66_ASSEMBLY_TOP.ger
fmc_tlu_v1a_66_ASSEMBLY_BOTTOM.ger
Board outline: (Gerber RS-274X)
-------------------------------
fmc_tlu_v1a_66_OUTLINE.ger
For details of FMC standard board outline see ansi_vita_57.1_double_fmc_outline.pdf
For details of cut-out for J3 ( Molex 44661-1011 very-low-height RJ45 connector ) see 446611011_sd.pdf
Some dimensions shown on:
fmc_tlu_v1a_66_DIMENSION.ger
Drill figure: ( illustration of hole sizes and position )
-------------
fmc_tlu_v1a_66_BOHR.ger
Drill information ( Excellon format, described in nc_param.txt )
-----------------
Plated and unplated holes in same file.
fmc_tlu_v1a_66_NC1.exc
Routing Information
-------------------
Centre-line for router
fmc_tlu_v1a_66.rou
Bill of Materials
-----------------
Two "sheets":
- one line per component type
- one line per component instance ( includes position information )
fmc_tlu_v1a.xlsx
Component placement
-------------------
placement_pin1.txt
( Position of pin-1 in mm and rotation in degrees of each component )
IPC-2581 format:
-------------
Fabrication and assembly information in
fmc_tlu_v1a_66.xml
\ No newline at end of file
Cadence/worklib/fmc_tlu_toplevel_c/physical/StepOutConfiguration.txt 0 → 100644
View file @ 387b8da7
EXPORT_UNIT = Millimeter
EXPORT_PROTOCOL = 214
BARE_BOARD_ONLY = NO
MAPPED_PACKAGE = NO
UNMAPPED_PACKAGE = YES
EXTERNAL_COPPER = NO
MECH_PART = NO
MECH_DRILL = YES
ZIP_FILE = NO
SOURCE_ID = allegro_16.6S014
Cadence/worklib/fmc_tlu_toplevel_c/physical/StepOutConfiguration.txt,1 0 → 100644
View file @ 387b8da7
EXPORT_UNIT = Millimeter
EXPORT_PROTOCOL = 214
BARE_BOARD_ONLY = NO
MAPPED_PACKAGE = NO
UNMAPPED_PACKAGE = YES
EXTERNAL_COPPER = NO
MECH_PART = NO
MECH_DRILL = YES
ZIP_FILE = NO
SOURCE_ID = allegro_16.6S014
Cadence/worklib/fmc_tlu_toplevel_c/physical/a2dxf.log 0 → 100644
View file @ 387b8da7
Reading Layer Conversion File
Layer conversion file: fmc_tlu_v1a_66_gloss4a_l.cnv
DXF file: fmc_tlu_v1a_66_gloss4a.dxf
BRD file: /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/circuit_board/Cadence/worklib/fmc_tlu_toplevel_b/physical/fmc_tlu_v1a_66_gloss4a.brd
Export symbols as blocks?: YES
Default symbol height: 1.00
Export padstacks as blocks?: YES
Filled pads: YES
Filled shapes: YES
Export drill information?: YES
DXF units: MILLIMETERS
DXF precision: 4
a2dxf complete.
Cadence/worklib/fmc_tlu_toplevel_c/physical/a2dxf.log,1 0 → 100644
View file @ 387b8da7
Reading Layer Conversion File
Layer conversion file: fmc_tlu_v1a_66_gloss4a_l.cnv
DXF file: fmc_tlu_v1a_66_gloss4a.dxf
BRD file: /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/circuit_board/Cadence/worklib/fmc_tlu_toplevel_b/physical/fmc_tlu_v1a_66_gloss4a.brd
Export symbols as blocks?: YES
Default symbol height: 1.00
Export padstacks as blocks?: YES
Filled pads: YES
Filled shapes: YES
Export drill information?: YES
DXF units: MILLIMETERS
DXF precision: 4
a2dxf complete.
Cadence/worklib/fmc_tlu_toplevel_c/physical/allegro.jrl 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/allegro.jrl,1 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/art_param.txt 0 → 100644
View file @ 387b8da7
DEVICE-TYPE GERBER_RS274X
OUTPUT-UNITS MM
FILM-SIZE 2400000 1600000
FORMAT 3.5
ABORT-ON-ERROR NO
SCALE 1
SUPPRESS-LEAD-ZEROES YES
SUPPRESS-TRAIL-ZEROES NO
SUPPRESS-EQUAL YES
UNDEF-APT-CONT NO
Cadence/worklib/fmc_tlu_toplevel_c/physical/batch_drc.log 0 → 100755
View file @ 387b8da7
(---------------------------------------------------------------------)
( )
( DRC Update )
( )
( Drawing : fmc_tlu_v1a_66_gloss4.brd )
( Software Version : 16.5S030 )
( Date/Time : Mon Jan 13 15:38:35 2014 )
( )
(---------------------------------------------------------------------)
========= check shapes 0:00:00
========= check standalone pins 0:00:00
========= check symbols (pins,lines,text) 0:00:00
========= check xnets 0:00:00
========= check nets 0:00:00
========= check standalone branches 0:00:00
========= check standalone filled rectangles 0:00:00
========= check standalone lines 0:00:00
========= check standalone text 0:00:00
========= check standalone rectangles 0:00:00
..... Total number of DRC errors 0
..... DRC update completed, total CPU time 0:00:00
*************************************************************************
Cadence/worklib/fmc_tlu_toplevel_c/physical/c230h160.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/c64.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/cmpshape.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/dbdoctor.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/devices.dml 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/diffpair_auto.log 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/eco.txt 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/eco.txt,1 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/enved.jrl 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/extract.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fcircle.il 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fcircle.zip 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_01.brd 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1.gvp 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1_33.SAV 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1_42.SAV 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_60.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_61.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_62.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_63.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_64.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_65.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_66.brd 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_66.rou 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/fmc_tlu_v1a_66.xml 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/genfeed.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/gloss.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/idf_out.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/interconn.iml 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/ipc2581_out.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/master.tag 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/nc_param.txt 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/nc_tools_auto.txt 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/ncdrill.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/nclegend.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/netrev.lst 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/p80.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/pad157rd2-7dn.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/photoplot.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/place_txt.txt 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/placement_pin1.txt 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/plctxt.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/pstcmdb2.dat 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r100_70.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r115_60.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r150_45.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r160_60.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r165_65.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r180_120.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r190_185.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r205_24.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r85_45.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/r90_30.pad 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/rename.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/router.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/router_long.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/signoise.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/step_out.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/step_out.log,1 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/swap.log 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/techfile.log 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/physical/tmp_place_pin1.txt 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/master.tag 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page.map 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page1.cpc 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page1.csa 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page1.csb 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page1.csv 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page2.cpc 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page2.csa 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page2.csb 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page2.csv 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page3.cpc 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page3.csa 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page3.csb 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/page3.csv 0 → 100755
View file @ 387b8da7
This diff is collapsed.
Cadence/worklib/fmc_tlu_toplevel_c/sch_1/pc.db 0 → 100644
View file @ 387b8da7
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment