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AIDA-2020 TLU - Hardware
Commit 678df933 authored by David Cussans's avatar David Cussans
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Checking in schematics for LVDS on HDMI to TTL on Lemo

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Cadence/fmc_tlu_hdmi_lemo_lvds_adaptor.cpm
View file @ 678df933
{ Machine generated file created by SPI }
{ Last modified was 15:38:47 Tuesday, June 19, 2018 }
{ Last modified was 08:50:49 Wednesday, June 20, 2018 }
{ NOTE: Do not modify the contents of this file. If this is regenerated by }
{ SPI, your modifications will be overwritten. }
......
Cadence/worklib/fmc_tlu_hdmi_passive_adaptor/sch_1/fmc_tlu_hdmi_passive_adaptor.dcf,2
View file @ 678df933
......@@ -7,7 +7,7 @@
( 16.6 )
)
( revisionNumber
( logicalViewRevNum 9 )
( logicalViewRevNum 10 )
( physicalViewRevNum 0 )
( otherViewRevNum 0 )
)
......@@ -1493,7 +1493,7 @@
( attribute "ROT" "0"
( Origin gFrontEnd )
)
( attribute "TYPE" "44661-1011"
( attribute "TYPE" "RJ45"
( Origin gFrontEnd )
)
( attribute "VER" "1"
......@@ -1505,62 +1505,35 @@
( attribute "CHIPS_PART_NAME" "CON8P"
( Origin gPackager )
)
( attribute "CDS_PART_NAME" "CON8P-44661-1011-GND=GND_SIGNAL"
( attribute "CDS_PART_NAME" "CON8P-RJ45-GND=GND_SIGNAL"
( Origin gPackager )
)
( attribute "CDS_PHYS_PART_NAME" "CON8P-44661-1011-GND=GND_SIGNAL"
( Origin gPackager )
)
( attribute "SEC" "1"
( Origin gPackager )
)
( objectStatus "J3" )
( pin "a(0)"
( attribute "PN" "1"
( Origin gPackager )
)
( objectStatus "J3.1" )
)
( pin "a(1)"
( attribute "PN" "2"
( Origin gPackager )
)
( objectStatus "J3.2" )
)
( pin "a(2)"
( attribute "PN" "3"
( Origin gPackager )
)
( objectStatus "J3.3" )
)
( pin "a(3)"
( attribute "PN" "4"
( Origin gPackager )
)
( objectStatus "J3.4" )
)
( pin "a(4)"
( attribute "PN" "5"
( Origin gPackager )
)
( objectStatus "J3.5" )
)
( pin "a(5)"
( attribute "PN" "6"
( Origin gPackager )
)
( objectStatus "J3.6" )
)
( pin "a(6)"
( attribute "PN" "7"
( Origin gPackager )
)
( objectStatus "J3.7" )
)
( pin "a(7)"
( attribute "PN" "8"
( Origin gPackager )
)
( objectStatus "J3.8" )
)
)
......
Cadence/worklib/fmc_tlu_hdmi_passive_adaptor/sch_1/fmc_tlu_hdmi_passive_adaptor.dcf,3
View file @ 678df933
......@@ -7,7 +7,7 @@
( 16.6 )
)
( revisionNumber
( logicalViewRevNum 10 )
( logicalViewRevNum 11 )
( physicalViewRevNum 0 )
( otherViewRevNum 0 )
)
......@@ -1508,32 +1508,59 @@
( attribute "CDS_PART_NAME" "CON8P-RJ45-GND=GND_SIGNAL"
( Origin gPackager )
)
( attribute "CDS_PHYS_PART_NAME" "CON8P-44661-1011-GND=GND_SIGNAL"
( attribute "CDS_PHYS_PART_NAME" "CON8P-RJ45-GND=GND_SIGNAL"
( Origin gPackager )
)
( attribute "SEC" "1"
( Origin gPackager )
)
( objectStatus "J3" )
( pin "a(0)"
( attribute "PN" "1"
( Origin gPackager )
)
( objectStatus "J3.1" )
)
( pin "a(1)"
( attribute "PN" "2"
( Origin gPackager )
)
( objectStatus "J3.2" )
)
( pin "a(2)"
( attribute "PN" "3"
( Origin gPackager )
)
( objectStatus "J3.3" )
)
( pin "a(3)"
( attribute "PN" "4"
( Origin gPackager )
)
( objectStatus "J3.4" )
)
( pin "a(4)"
( attribute "PN" "5"
( Origin gPackager )
)
( objectStatus "J3.5" )
)
( pin "a(5)"
( attribute "PN" "6"
( Origin gPackager )
)
( objectStatus "J3.6" )
)
( pin "a(6)"
( attribute "PN" "7"
( Origin gPackager )
)
( objectStatus "J3.7" )
)
( pin "a(7)"
( attribute "PN" "8"
( Origin gPackager )
)
( objectStatus "J3.8" )
)
)
......
Cadence/worklib/fmc_tlu_toplevel_c/packaged/tlu_lpc_pins.xdc 0 → 100755
View file @ 678df933
set_property PACKAGE_PIN T4 [get_ports {CLK_TO_FPGA_N}]
set_property PACKAGE_PIN T5 [get_ports {CLK_TO_FPGA_P}]
set_property PACKAGE_PIN D3 [get_ports {CLK_FROM_FPGA_N}]
set_property PACKAGE_PIN E3 [get_ports {CLK_FROM_FPGA_P}]
set_property PACKAGE_PIN P5 [get_ports {CONT_TO_FPGA_P[0]}]
set_property PACKAGE_PIN N5 [get_ports {CLK_GEN_LOL_N}]
set_property PACKAGE_PIN P3 [get_ports {CONT_TO_FPGA_P[1]}]
set_property PACKAGE_PIN P4 [get_ports {CONT_FROM_FPGA_P[1]}]
set_property PACKAGE_PIN N6 [get_ports {CONT_TO_FPGA_P[2]}]
set_property PACKAGE_PIN M6 [get_ports {CONT_FROM_FPGA_P[2]}]
set_property PACKAGE_PIN L5 [get_ports {CONT_TO_FPGA_P[3]}]
set_property PACKAGE_PIN L6 [get_ports {CONT_FROM_FPGA_P[3]}]
set_property PACKAGE_PIN M1 [get_ports {SPARE_TO_FPGA_N[0]}]
set_property PACKAGE_PIN L1 [get_ports {SPARE_FROM_FPGA_P[0]}]
set_property PACKAGE_PIN N4 [get_ports {SPARE_TO_FPGA_N[1]}]
set_property PACKAGE_PIN M4 [get_ports {SPARE_FROM_FPGA_P[1]}]
set_property PACKAGE_PIN N1 [get_ports {SPARE_TO_FPGA_N[2]}]
set_property PACKAGE_PIN N2 [get_ports {SPARE_FROM_FPGA_P[2]}]
set_property PACKAGE_PIN M2 [get_ports {SPARE_TO_FPGA_N[3]}]
set_property PACKAGE_PIN M3 [get_ports {SPARE_FROM_FPGA_P[3]}]
set_property PACKAGE_PIN R5 [get_ports {TRIG_TO_FPGA_N[0]}]
set_property PACKAGE_PIN R6 [get_ports {TRIG_FROM_FPGA_P[0]}]
set_property PACKAGE_PIN R2 [get_ports {TRIG_TO_FPGA_N[1]}]
set_property PACKAGE_PIN P2 [get_ports {TRIG_FROM_FPGA_P[1]}]
set_property PACKAGE_PIN T1 [get_ports {TRIG_TO_FPGA_N[2]}]
set_property PACKAGE_PIN R1 [get_ports {TRIG_FROM_FPGA_P[2]}]
set_property PACKAGE_PIN V1 [get_ports {TRIG_TO_FPGA_N[3]}]
set_property PACKAGE_PIN U1 [get_ports {TRIG_FROM_FPGA_P[3]}]
set_property PACKAGE_PIN T6 [get_ports {BUSY_TO_FPGA_P[0]}]
set_property PACKAGE_PIN R7 [get_ports {BUSY_FROM_FPGA_P[0]}]
set_property PACKAGE_PIN U3 [get_ports {BUSY_TO_FPGA_P[1]}]
set_property PACKAGE_PIN U4 [get_ports {BUSY_FROM_FPGA_P[1]}]
set_property PACKAGE_PIN T8 [get_ports {BUSY_TO_FPGA_P[2]}]
set_property PACKAGE_PIN R8 [get_ports {BUSY_FROM_FPGA_P[2]}]
set_property PACKAGE_PIN L4 [get_ports {BUSY_TO_FPGA_P[3]}]
set_property PACKAGE_PIN K5 [get_ports {BUSY_FROM_FPGA_P[3]}]
set_property PACKAGE_PIN L3 [get_ports {DUT_CLK_TO_FPGA_P[0]}]
set_property PACKAGE_PIN K3 [get_ports {DUT_CLK_FROM_FPGA_P[0]}]
set_property PACKAGE_PIN F3 [get_ports {DUT_CLK_TO_FPGA_P[1]}]
set_property PACKAGE_PIN F4 [get_ports {DUT_CLK_FROM_FPGA_P[1]}]
set_property PACKAGE_PIN D2 [get_ports {DUT_CLK_TO_FPGA_P[2]}]
set_property PACKAGE_PIN E2 [get_ports {DUT_CLK_FROM_FPGA_P[2]}]
set_property PACKAGE_PIN G3 [get_ports {DUT_CLK_TO_FPGA_P[3]}]
set_property PACKAGE_PIN G4 [get_ports {DUT_CLK_FROM_FPGA_P[3]}]
set_property PACKAGE_PIN C1 [get_ports {CLK_GEN_RST_N}]
set_property PACKAGE_PIN C2 [get_ports {I2C_RESET_N}]
set_property PACKAGE_PIN F6 [get_ports {GPIO}]
set_property PACKAGE_PIN H4 [get_ports {BEAM_TRIGGER_N[4]}]
set_property PACKAGE_PIN J4 [get_ports {BEAM_TRIGGER_P[4]}]
set_property PACKAGE_PIN G1 [get_ports {BEAM_TRIGGER_N[5]}]
set_property PACKAGE_PIN H1 [get_ports {BEAM_TRIGGER_P[5]}]
set_property PACKAGE_PIN K1 [get_ports {BEAM_TRIGGER_N[2]}]
set_property PACKAGE_PIN K2 [get_ports {BEAM_TRIGGER_P[2]}]
set_property PACKAGE_PIN C5 [get_ports {BEAM_TRIGGER_N[3]}]
set_property PACKAGE_PIN C6 [get_ports {BEAM_TRIGGER_P[3]}]
set_property PACKAGE_PIN A1 [get_ports {BEAM_TRIGGER_N[0]}]
set_property PACKAGE_PIN B1 [get_ports {BEAM_TRIGGER_P[0]}]
set_property PACKAGE_PIN B4 [get_ports {BEAM_TRIGGER_N[1]}]
set_property PACKAGE_PIN C4 [get_ports {BEAM_TRIGGER_P[1]}]
# Also in main XDC file...
# set_property PACKAGE_PIN N17 [get_ports {SCL}]
# set_property PACKAGE_PIN P18 [get_ports {SDA}]
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