AIDA FMC Mini-TLU
Firmware for FMC-based mini-TLU (Trigger/Timing/Tagging Logic Unit) for AIDA
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Here is a list of all documented class members with links to the class documentation for each member:
- _ -
__init__() :
FmcTluI2c
,
I2cBusProperties
- a -
async_i :
Reg_2clks
Async_i :
sync_reg
- b -
buffer_full_o :
eventBuffer
,
top_extphy.struct
buffered_clock :
fmc_tlu_sp601.rtl
busy_p_i :
top_extphy
- c -
c_FALLING_EDGE_BIT :
arrivalTimeLUT.rtl
c_LUT :
arrivalTimeLUT.rtl
c_MULTI_EDGE_BIT :
arrivalTimeLUT.rtl
c_NUM_INTERNAL_SLAVES :
IPBusInterface.rtl
c_RISING_EDGE_BIT :
arrivalTimeLUT.rtl
cbc_i2c_scl_o :
slaves
cbc_i2c_sda_enb_o :
slaves
CE :
dtype_fdpe
CLK :
dtype_fd
,
dtype_fdpe
,
dtype_fdr
,
dtype_fds
,
pulse_shaper_async_dtypes
clk_16x_logic_i :
triggerInputs
clk_4x_logic :
top_extphy.struct
clk_4x_logic_i :
arrivalTimeLUT
CLK_i :
pulse_shaper
clk_i :
Reg_2clks
,
serdes_1_to_n_SDR
,
pulse_shaper_scorer
,
sync_reg
clk_input_i :
pulseClockDomainCrossing
clk_output_i :
pulseClockDomainCrossing
convert_voltage_to_dac() :
FmcTluI2c
- d -
D :
dtype_fd
,
dtype_fdpe
,
dtype_fds
,
fmc_tlu_sp601
,
dtype_fdr
,
pulse_shaper_async_dtypes
D_a_i :
pulse_shaper
D_R1 :
pulse_shaper_async_dtypes.rtl
Data_i :
serdes_1_to_n_SDR
Data_o :
serdes_1_to_n_SDR
data_o :
dualSERDES_1to4
dtype_fd :
pulse_shaper.rtl
dtype_fdpe :
pulse_shaper_async_dtypes.rtl
,
pulse_shaper.rtl
dtype_fdr :
pulse_shaper.rtl
dtype_fds :
pulse_shaper.rtl
- e -
eeprom_read() :
FmcTluI2c
eeprom_write() :
FmcTluI2c
eventBuffer :
top_extphy.struct
eventFormatter :
top_extphy.struct
extclk_p_b :
top_extphy
- f -
fabricClk_i :
dualSERDES_1to4
fastClk_i :
dualSERDES_1to4
fsm() :
dualSERDES_1to4.rtl
- g -
g_NUM_EXT_SLAVES :
top_extphy
g_S :
serdes_1_to_n_SDR
get_serial_number() :
FmcTluI2c
- h -
hclk_i :
serdes_1_to_n_SDR
- i -
i2c_master :
top_extphy.struct
i2c_scan() :
FmcTluI2c
ipbr :
top_extphy.struct
ipbus_write() :
eventBuffer.rtl
ipbw :
top_extphy.struct
- m -
MASK_WIDTH :
pulse_shaper_async_dtypes
- o -
overall_trigger :
top_extphy.struct
overall_veto :
top_extphy.struct
- p -
p_gen_output_strobe() :
registerCounter.rtl
PRE :
dtype_fdpe
preload :
pulse_shaper_async_dtypes.rtl
pulse_i :
pulseClockDomainCrossing
PULSE_LENGTH_i :
pulse_shaper
pulse_o :
pulseClockDomainCrossing
pulse_out_a_i :
pulse_shaper_scorer
pulse_shaper :
fmc_tlu_sp601.rtl
pulse_shaper_scorer :
fmc_tlu_sp601_tb.behavior
- q -
Q :
dtype_fd
,
dtype_fdpe
,
dtype_fds
,
fmc_tlu_sp601
,
pulse_shaper_async_dtypes
,
dtype_fdr
Q_a_o :
pulse_shaper
Q_R1 :
pulse_shaper_async_dtypes.rtl
Q_R2 :
pulse_shaper_async_dtypes.rtl
- r -
reset_i :
serdes_1_to_n_SDR
RST :
dtype_fdr
,
fmc_tlu_sp601
RST_i :
pulse_shaper
- s -
s_cal_FSM :
dualSERDES_1to4.rtl
s_coarse_bits :
arrivalTimeLUT.rtl
s_D_d1 :
pulse_shaper.rtl
s_D_d2 :
pulse_shaper.rtl
s_data_o :
dualSERDES_1to4.rtl
s_event_strobe :
eventFormatter.rtl
s_logic_clk_generator :
logic_clocks.rtl
s_Q_d1 :
pulse_shaper.rtl
s_Q_d2 :
pulse_shaper.rtl
s_Q_d3 :
pulse_shaper.rtl
s_rst_iserdes :
triggerInputs.rtl
s_rst_iserdes_ipb :
triggerInputs.rtl
s_trigger_pattern :
triggerLogic.rtl
s_vetoed_pulse_a :
pulse_shaper.rtl
s_wr_data_count :
eventBuffer.rtl
serdes_ready_o :
dualSERDES_1to4
serdes_reset_i :
dualSERDES_1to4
SET :
dtype_fds
set_dac() :
FmcTluI2c
shift_reg :
pulse_shaper_async_dtypes.rtl
state_values :
dualSERDES_1to4.rtl
statereg() :
dualSERDES_1to4.rtl
strobe_16x_logic :
top_extphy.struct
strobe_16x_logic_i :
triggerInputs
strobe_4x_logic_i :
arrivalTimeLUT
strobe_i :
dualSERDES_1to4
,
serdes_1_to_n_SDR
sync_o :
Reg_2clks
Sync_o :
sync_reg
SYSCLK_N :
fmc_tlu_sp601
sysclk_n_i :
top_extphy
SYSCLK_P :
fmc_tlu_sp601
- t -
trigGen() :
triggerLogic.rtl
trigger_active_o :
triggerLogic
trigger_count_i :
eventBuffer
trigger_i :
eventFormatter
triggerInputs :
top_extphy.struct
triggerLogic :
top_extphy.struct
triggers_p_o :
top_extphy
- u -
UNISIM :
fmc_tlu_sp601
,
pulse_shaper
,
fmc_tlu_top
- v -
vcomponents :
pulse_shaper
veto_o :
top_extphy.struct
vetoed_pulse :
pulse_shaper_async_dtypes.rtl
Generated on Tue Feb 18 2014 12:24:04 for AIDA FMC Mini-TLU by
1.8.3.1