Commit a4d7a4e0 authored by Paolo Baesso's avatar Paolo Baesso

Added reference to JINST 2019 TLU paper

parent ea109b0d
...@@ -5,6 +5,13 @@ This manual describes the \gls{tlu} designed for the \href{http://aida2020.web.c ...@@ -5,6 +5,13 @@ This manual describes the \gls{tlu} designed for the \href{http://aida2020.web.c
The unit is designed to be used in High Energy Physics beam-tests and provides a simple and flexible interface for fast timing and triggering signals at the AIDA pixel sensor beam-telescope.\\ The unit is designed to be used in High Energy Physics beam-tests and provides a simple and flexible interface for fast timing and triggering signals at the AIDA pixel sensor beam-telescope.\\
The current version of the hardware is an evolution of the \href{https://twiki.cern.ch/twiki/bin/view/MimosaTelescope/TLU}{EUDET-TLU} and the \href{https://www.ohwr.org/projects/fmc-mtlu/wiki}{miniTLU} and is shipped in a metal enclosure that includes an \gls{fpga} board, the \gls{tlu} \gls{pcb} and an additional power module: the \gls{fpga} is responsible for all the logic functions of the unit, while the \gls{pcb} contains the clock chip, discriminator and interface blocks needed to communicate with other devices. The power module contains programmable \gls{dac} to power photomultipliers and \gls{led} indicators.\\ The current version of the hardware is an evolution of the \href{https://twiki.cern.ch/twiki/bin/view/MimosaTelescope/TLU}{EUDET-TLU} and the \href{https://www.ohwr.org/projects/fmc-mtlu/wiki}{miniTLU} and is shipped in a metal enclosure that includes an \gls{fpga} board, the \gls{tlu} \gls{pcb} and an additional power module: the \gls{fpga} is responsible for all the logic functions of the unit, while the \gls{pcb} contains the clock chip, discriminator and interface blocks needed to communicate with other devices. The power module contains programmable \gls{dac} to power photomultipliers and \gls{led} indicators.\\
The current version of the \gls{pcb} is \brd and is designed to plug onto a carrier \gls{fpga} board like any other \gls{fmc} mezzanine board, although its form factor does not comply with the ANSI-VITA-57-1 standard.\\ The current version of the \gls{pcb} is \brd and is designed to plug onto a carrier \gls{fpga} board like any other \gls{fmc} mezzanine board, although its form factor does not comply with the ANSI-VITA-57-1 standard.\\
\newpage
\section{Reference publication for the AIDA-2020 \gls{tlu}}
Please consider citing the \gls{tlu} reference paper in your publications. This will help us making a case to continue the support and development of the TLU.\\
The paper is available open access on JINST (Journal of Instrumentation):\\
\noindent \href{https://doi.org/10.1088/1748-0221/14/09/P09019}{"The AIDA-2020 TLU: a Flexible Trigger Logic Unit for Test Beam Facilities."}\\
doi = 10.1088/1748-0221/14/09/p09019
\section{Overview} \section{Overview}
The AIDA \gls{tlu} provides timing and synchronization signals to test-beam readout hardware.\\ The AIDA \gls{tlu} provides timing and synchronization signals to test-beam readout hardware.\\
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