Separate JTAG chains or lower TRST pull-down resistor value
NanoFIP FPGA has the TRST always asserted due to pull-down resistor R2. In V2 the TRST pin is disconnected from the FMC connector, as the pull-down resistor (R2) was too strong for certain adapters (see issue #1774). It means that the nanoFIP FPGA is still not accessible from the FMC JTAG chain, because an external adapter cannot deassert the TRST pin.
We may either completely separate FMC and nanoFIP JTAG chains or connect the TRST and lower the pull-down resistor value. The latter solution may increase the risk of spurious JTAG transactions.