FPGA Mezzanine Card (FMC) standard info
FMC standard ANSI/VITA 57.1
ANSI/VITA 57.1-2008 FPGA Mezzanine Card (FMC) Standard
FMC+ standard ANSI/VITA 57.4
- VITA 57.4x – 2015x 2 FPGA Mezzanine Card Plus (FMC+)
The FMC+ standard extends the VITA 57.1 FMC standard by specifying two
new connectors that enable 6 additional Gigabit Transceiver interfaces
that run at up to 28Gbps.
It also describes FMC+ IO modules which support this enhanced version of
the FMC electro-mechanical standard. This is between the front-panel IO,
on the mezzanine module, and an FPGA processing device on the carrier
card, which accepts the mezzanine module.
Additional signals to support backplane reference clock and
synchronization have been added.
The VITA 57.4 specification is backwards compatible in that a VITA 57.4
carrier card can still support a VITA 57.1 FMC.
The FMC+ standard is in its "final draft" to be approved by ANSI.
FMC and FMC+ pinout
- FMC and FMC+ pinout (.xls)
FMC EEPROM
Use a EEPROM 24C02
- An FMC mezzanine should have a specific EEPROM (24C02, not a
24AA64T-I/MC, or a DS1624 temp sensor with EEPROM).
Standards for the mezzanine's EEPROM data
- Intelligent Platform Management Interface (Intel)
- Base IPMI commands defined in the PICMG 2.9 specification (CompactPCI System Management)
Utilities for creating the EEPROM data
-
fmc_eeprom.py
The tool generates the eeprom content in a file. As part of the PTS there is a step where that file gets written into the EEPROM. - Fmceeprom utility in OHR
Other links
- VITA FMC Alliance - refers to these OHR pages
- Adopting VITA 57 (FMC): Reducing FPGA I/O headaches
- A Brief History of FMC (VITA-57), fun background
- LinkedIn FMC Group
Erik van der Bij - 13 July 2022