| Device Utilization Summary | [-] |
| Slice Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Registers |
6,526 |
184,304 |
3% |
|
| Number used as Flip Flops |
6,480 |
|
|
|
| Number used as Latches |
0 |
|
|
|
| Number used as Latch-thrus |
0 |
|
|
|
| Number used as AND/OR logics |
46 |
|
|
|
| Number of Slice LUTs |
9,209 |
92,152 |
9% |
|
| Number used as logic |
8,925 |
92,152 |
9% |
|
| Number using O6 output only |
5,942 |
|
|
|
| Number using O5 output only |
387 |
|
|
|
| Number using O5 and O6 |
2,596 |
|
|
|
| Number used as ROM |
0 |
|
|
|
| Number used as Memory |
37 |
21,680 |
1% |
|
| Number used as Dual Port RAM |
0 |
|
|
|
| Number used as Single Port RAM |
0 |
|
|
|
| Number used as Shift Register |
37 |
|
|
|
| Number using O6 output only |
11 |
|
|
|
| Number using O5 output only |
0 |
|
|
|
| Number using O5 and O6 |
26 |
|
|
|
| Number used exclusively as route-thrus |
247 |
|
|
|
| Number with same-slice register load |
173 |
|
|
|
| Number with same-slice carry load |
74 |
|
|
|
| Number with other load |
0 |
|
|
|
| Number of occupied Slices |
3,605 |
23,038 |
15% |
|
| Nummber of MUXCYs used |
2,396 |
46,076 |
5% |
|
| Number of LUT Flip Flop pairs used |
10,450 |
|
|
|
| Number with an unused Flip Flop |
4,699 |
10,450 |
44% |
|
| Number with an unused LUT |
1,241 |
10,450 |
11% |
|
| Number of fully used LUT-FF pairs |
4,510 |
10,450 |
43% |
|
| Number of unique control sets |
207 |
|
|
|
Number of slice register sites lost
to control set restrictions |
361 |
184,304 |
1% |
|
| Number of bonded IOBs |
253 |
540 |
46% |
|
| Number of LOCed IOBs |
253 |
253 |
100% |
|
| IOB Flip Flops |
209 |
|
|
|
| Number of RAMB16BWERs |
14 |
268 |
5% |
|
| Number of RAMB8BWERs |
7 |
536 |
1% |
|
| Number of BUFIO2/BUFIO2_2CLKs |
0 |
32 |
0% |
|
| Number of BUFIO2FB/BUFIO2FB_2CLKs |
0 |
32 |
0% |
|
| Number of BUFG/BUFGMUXs |
4 |
16 |
25% |
|
| Number used as BUFGs |
4 |
|
|
|
| Number used as BUFGMUX |
0 |
|
|
|
| Number of DCM/DCM_CLKGENs |
0 |
12 |
0% |
|
| Number of ILOGIC2/ISERDES2s |
138 |
586 |
23% |
|
| Number used as ILOGIC2s |
138 |
|
|
|
| Number used as ISERDES2s |
0 |
|
|
|
| Number of IODELAY2/IODRP2/IODRP2_MCBs |
0 |
586 |
0% |
|
| Number of OLOGIC2/OSERDES2s |
71 |
586 |
12% |
|
| Number used as OLOGIC2s |
71 |
|
|
|
| Number used as OSERDES2s |
0 |
|
|
|
| Number of BSCANs |
0 |
4 |
0% |
|
| Number of BUFHs |
0 |
384 |
0% |
|
| Number of BUFPLLs |
0 |
8 |
0% |
|
| Number of BUFPLL_MCBs |
0 |
4 |
0% |
|
| Number of DSP48A1s |
0 |
180 |
0% |
|
| Number of GTPA1_DUALs |
0 |
4 |
0% |
|
| Number of ICAPs |
0 |
1 |
0% |
|
| Number of MCBs |
0 |
4 |
0% |
|
| Number of PCIE_A1s |
0 |
1 |
0% |
|
| Number of PCILOGICSEs |
0 |
2 |
0% |
|
| Number of PLL_ADVs |
1 |
6 |
16% |
|
| Number of PMVs |
0 |
1 |
0% |
|
| Number of STARTUPs |
0 |
1 |
0% |
|
| Number of SUSPEND_SYNCs |
0 |
1 |
0% |
|
| Average Fanout of Non-Clock Nets |
3.94 |
|
|
|