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FMC TDC 1ns 5cha - Gateware
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FMC TDC 1ns 5cha - Gateware
Commits
31e4f6f5
Commit
31e4f6f5
authored
Sep 28, 2019
by
Dimitris Lampridis
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[hdl] [bugfix] clean up leftover code causing multiple fake timestamps being recorded from FIFO2
parent
aa3a163b
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hdl/rtl/data_engine.vhd
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31e4f6f5
...
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@@ -424,9 +424,6 @@ begin
if
acam_ef1_i
=
'0'
then
nxt_engine_st
<=
GET_STAMP1
;
elsif
acam_ef2_i
=
'0'
then
nxt_engine_st
<=
GET_STAMP2
;
else
nxt_engine_st
<=
ACTIVE
;
end
if
;
...
...
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