Commit 3a1b7327 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

top/svec: bool2int function is now in general_cores

parent 4f827cec
......@@ -326,32 +326,6 @@ end wr_svec_tdc;
--=================================================================================================
architecture rtl of wr_svec_tdc is
function f_bool2int (x : boolean) return integer is
begin
if(x) then
return 1;
else
return 0;
end if;
end f_bool2int;
component spec_serial_dac is
generic (
g_num_data_bits : integer;
g_num_extra_bits : integer;
g_num_cs_select : integer);
port (
clk_i : in std_logic;
rst_n_i : in std_logic;
value_i : in std_logic_vector(g_num_data_bits-1 downto 0);
cs_sel_i : in std_logic_vector(g_num_cs_select-1 downto 0);
load_i : in std_logic;
sclk_divsel_i : in std_logic_vector(2 downto 0);
dac_cs_n_o : out std_logic_vector(g_num_cs_select-1 downto 0);
dac_sclk_o : out std_logic;
dac_sdata_o : out std_logic;
xdone_o : out std_logic);
end component spec_serial_dac;
---------------------------------------------------------------------------------------------------
-- SDB CONSTANTS --
---------------------------------------------------------------------------------------------------
......
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