Commit 84ffc99f authored by Dimitris Lampridis's avatar Dimitris Lampridis

Update submodules. Please test!

The following changes were done:

1. Point all submodules to new OHWR

2. update ddr3-sp6-core to latest master because the previous commit
(8618c1e154c322be34cb069b62d8293527744dda) was not available in OHWR. Please test!

3. remove etherbone-core

4. update general-cores to latest master and use the updated gc_ds182x_readout module
parent 8d26f093
[submodule "ip-cores/general-cores"]
path = hdl/ip_cores/general-cores
url = git://
url =
[submodule "hdl/ip_cores/wr-cores"]
path = hdl/ip_cores/wr-cores
url = git://
url =
[submodule "hdl/ip_cores/vme64x-core"]
path = hdl/ip_cores/vme64x-core
url = git://
url =
[submodule "hdl/ip_cores/gn4124-core"]
path = hdl/ip_cores/gn4124-core
url = git://
url =
[submodule "hdl/ip_cores/ddr3-sp6-core"]
path = hdl/ip_cores/ddr3-sp6-core
url = git://
url =
Subproject commit 8618c1e154c322be34cb069b62d8293527744dda
Subproject commit bb5b8f75e6f85335b43fef320375404686a74008
etherbone-core @ f19220ff
Subproject commit f19220ffa3c5e526f66ebbded5e0e1e789e7255d
Subproject commit 4d36bf859fa6071acf11d86e1d57ab3a65a5f776
Subproject commit f73bc3d2959bdaab52adf910d99ed90cabab11ab
......@@ -648,7 +648,7 @@ begin
i2c_scl_oen_o <= sys_scl_oe_n;
i2c_scl_o <= sys_scl_out;
U_OnewireIF : gc_ds182x_interface
U_OnewireIF : gc_ds182x_readout
generic map (
g_CLOCK_FREQ_KHZ => 62500,
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