Commit 9800f270 authored by penacoba's avatar penacoba

Testbench adapted to new values for start retrigger


git-svn-id: http://svn.ohwr.org/fmc-tdc@55 85dfdc96-de2c-444c-878d-45b388be74a9
parent 57ec601c
......@@ -28,6 +28,7 @@ architecture behavioral of tb_tdc is
component top_tdc
generic(
g_span : integer :=32;
g_width : integer :=32;
values_for_simulation : boolean :=FALSE
);
......@@ -266,8 +267,9 @@ architecture behavioral of tb_tdc is
constant pll_clk_period : time:= 8 ns;
constant g_width : integer:= 32;
constant start_retrig_period : time:= 3200 ns;
constant g_span : integer:= 32;
constant spec_clk_period : time:= 50 ns;
constant start_retrig_period : time:= 512 ns;
-- Number of Models receiving commands
constant N_BFM : integer := 1; -- 0 : GN412X_BFM in Model Mode
......@@ -385,6 +387,7 @@ begin
dut: top_tdc
generic map(
g_span => 32,
g_width => 32,
values_for_simulation => TRUE
)
......
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