FMC TDC 1ns 5cha - Gateware:7f3e7a0e0af2d3f7df027962d76a369f62db7a50 commitshttps://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commits/7f3e7a0e0af2d3f7df027962d76a369f62db7a502011-11-08T10:29:46Zhttps://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/7f3e7a0e0af2d3f7df027962d76a369f62db7a50Timing problems solved by adding registers on the Term En outputs2011-11-08T10:29:46Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@59" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@59</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/d4b1ca5229f616d628cb661e46ded3c3b05fc08bCompletion of the Coregen files from the new version of the Xilin 13.3 software2011-11-08T10:21:10Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@58" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@58</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/f33ef0bca2655c680712b59aa5334f4a2415a4a5New versions of the core from Coregen to instantiate the RAM block for the Ci...2011-11-08T10:11:53Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@57" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@57</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/07d08c43b292ff062743afcf348194a97953abf1Operational version with full timestamps and no timing errors2011-11-01T17:33:00Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@56" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@56</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/9800f270ba7ecf69019ecb8742d1e896d8243f3bTestbench adapted to new values for start retrigger2011-10-24T17:55:17Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@55" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@55</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/57ec601cfc7cf7885f481ee3f01866679dcb55d2First complete version. Simulation ok. Pending from synthesis.2011-10-24T17:54:42Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@54" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@54</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/8250f67cee79617cacc4dd3a8339514a1ec5f073Raw_timestamps version2011-10-20T16:14:55Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@53" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@53</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/757b8fffdde4cfc5e3b16ddad48b56d450347874Improved models for testbench2011-10-18T17:03:33Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@52" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@52</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/320d75f024206087e580eecddd7386cfff74e0f5Operational version of the data engine FSM 2011-10-18T17:02:46Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9+ corrected bug of start_from_fpga generation after reset
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@51" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@51</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/dc894263bbec8dc8f6776d7f7be691390ad0b3ffgit-svn-id: http://svn.ohwr.org/fmc-tdc@50 85dfdc96-de2c-444c-878d-45b388be74a92011-10-18T09:33:51Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/fbdc40062283a72da63faddeb112c6ef9166b7c4New Register Control module for the core based in RAM block2011-10-11T10:07:13Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@49" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@49</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/8c49a6d80c7c1eb46d732429bfd513f328edda25Version synthesised and tried on hardware, that allows read/write on the memory…2011-10-06T10:57:53Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9Version synthesised and tried on hardware, that allows read/write on the memory through the CSR port.
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@48" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@48</a> 85dfdc96-de2c-444c-878d-45b388be74a9
https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/b5af3b6c11861340d214fdbf79a715b5026d7faeMemory core generated by coregen.2011-10-06T10:07:08Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@47" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@47</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/4af69194e31ae431277b3dfc8a3d7425bdd4c49cGenerated circular buffer with RAM block.2011-10-06T10:05:22Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@46" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@46</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/07fa5b2366eb15e61fce7890d69ff5e4ee6568beFirst version of binary file that obtains correct timestamps from the ACAM fo...2011-10-04T16:03:10Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@45" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@45</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/e4bc3c96661ac3338c6811807bc279fddbd655faUdpated simulations2011-10-04T15:56:50Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@44" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@44</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/4a2b9391523c8fb45da56eb2577ed0c5bd58622dAdjusted test_bench2011-10-04T15:55:16Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@43" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@43</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/442adcb594e3ff7826fc9cbdfcd4da1f54f940c5Modifications of the Acam enable and start from FPGA for correct operation2011-10-04T15:54:38Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@42" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@42</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/d7077e061dc24af5f8cbfc24461a02e1e8a44627Modifications for large Tstart pulse2011-09-23T10:03:30Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@41" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@41</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/8d74d3fab8b1ef5ac351768278299d72fa1b4a27Top reorganized, and outputs for the Acam properly registered.2011-08-03T20:07:15Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@40" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@40</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/552710a76a974a6c1e9e78250248a3e5400592b5New preliminary modules after design specification review2011-07-29T18:25:52Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@39" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@39</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/a4e6cbd179f86e44db0e14ad9eec5b0b514a0b7csimulation files clean-up2011-07-29T15:47:57Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@38" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@38</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/ab7af5fd6cd29d299d7d65e38f66c658613908fbSynthesis scripts after the ACAM TDC test2011-07-29T15:22:33Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@37" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@37</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/d13db7b9c3db7a87d96ae1ffe9e3f5a70bd95ce6cleaned up version of the ACAM TDC synthesis results2011-07-29T15:21:23Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@36" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@36</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/cb30b5d138db1c790b241fa85319261cb63eae9dcleaned up version of the PLL test synthesis results2011-07-29T15:17:28Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@35" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@35</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/b5ae1362590fe78de6bac54d58123fd0d4218ef5Improved version of PLL test + first operating version of ACAM test2011-07-21T19:42:19Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@34" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@34</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/c86fe33b390dce598ed154895094f59782b6435fFirst operating .bit for the test of the mezzaning pll inside syn/test_tdc_pll2011-07-18T07:05:28Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@33" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@33</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/b4d12c3205ab02660096c856586575f82892fdc8First versions for hardware test2011-07-11T13:22:22Zpenacobapenacoba@85dfdc96-de2c-444c-878d-45b388be74a9
git-svn-id: <a href="http://svn.ohwr.org/fmc-tdc@32" rel="nofollow noreferrer noopener" target="_blank">http://svn.ohwr.org/fmc-tdc@32</a> 85dfdc96-de2c-444c-878d-45b388be74a9https://ohwr.org/project/fmc-tdc-1ns-5cha-gw/commit/4c9264e1846894b212cfd5b6bbb3dd326e77e272git-svn-id: http://svn.ohwr.org/fmc-tdc@1 85dfdc96-de2c-444c-878d-45b388be74a92011-03-09T16:01:13Znvoumardnvoumard@85dfdc96-de2c-444c-878d-45b388be74a9