SPEC TDC Release 1.0
Binary
Memory map
Register map and Operation procedure
Sources
Gateware (rev 74)
Release date
16.11.2011
Release notes
First release from Gonzalo Penacoba
Note (27.07.2011): After having debugged the TDC mezzanine prototype,
and been able to configure and obtain timestamps from the ACAM chip, a
meeting was held to agree on the details
and options for the actual implementation of the application in the
firmware of the SPEC FPGA. During the meeting it was decided to use the
internal start retrigger
mode of the ACAM chip. It was also pointed out the need to allow for the
writing of the DAC to tune the oscillator + integrate the white rabbit
core (check also relevant
presentation).
_Back to the gateware release page_
E.Gousiou, Feb 2014