V3-0 - Change stackup
- Verify proposal for a new stackup.
- JGR: Some nets of the bus TDC_D[27..0] were routed in the inside layers with 8 mils of track width. According to my calculations, in this inside layers the impedance is about 67 Ω > 50 Ω +/- 10%. This impedance step may degrade the signal quality. I'd prefer to propose, if you believe it needed, another PCB stack-up to fit better the 50 ohms impedance requirement without having to change the routing.
- NV: Please explain… We can also enlarge the tracks on the internal layers and/or (don’t know if it’s possible) to grow up the internal layers thickness.
- EB: To check in a future version.
- JGR: I'd like to propose for this series (December 2012 - EB) this PCB stack-up as an alternative (see the image below). Using it you can achieve an impedance of about 50-55R for single ended internal layers, improving the signals quality.
- NV: I cannot see the image… ;-).
- EB: To check in a future version. Do not change the PCB specification and produce as specified. The differences in impedances are too low to validate a change now.
EB: I checked the differences in stackup between the original design files and the ones that Wurth is proposing (see attached file).
Basically there is
- a slight difference in prepreg thickness at L1/L2 and L5/L6 (150 vs 163 um).
- a large difference in the other thicknesses L2/L3 and L4/L5 (500 vs 200 um) and L3/L4 (150 vs 570 um)
I believe that there nothing critical on this card, but still would like the production version to be as similar as possible to our prototype and therefore we should follow our original design files.