#!   /usr/bin/env   python
#    coding: utf8
##_________________________________________________________________________________________________
##                                                                                                |
##                                           |TDC PTS|                                            |
##                                                                                                |
##                                         CERN,BE/CO-HT                                          |
##________________________________________________________________________________________________|

##-------------------------------------------------------------------------------------------------
##                                                                                                |
##                                   TDC ACAM ERROR FLAG test                                     |
##                                                                                                |
##-------------------------------------------------------------------------------------------------
##                                                                                                |
## Description  Testing of the TDC_ERR signal coming from the ACAM.                               |
##              Through the configuration register 11, the ERR flag is configured to get activated|
##              upon overflow on the interface FIFOs; an overflow occurs when the timestamps      |
##              arrival rate is higher than 31.25MHz.                                             |
##              The test is using the Fine Delay as pulse generator sending pulses to the five    |
##              channels with a total rate of 100MHz and is monitiring the TDC_ERR signal.        |
##                                                                                                |
##              The TDC_ERR signal can be accessed at PCIe address: 0xC0048                       |
##              The TDC_ERR register can be reset by writing '1' at PCIe address: 0xC004C         |
##                                                                                                |
##                                                                                                |
## FW to load   .bin                                                                              |
## Authors      Evangelia Gousiou (Evangelia.Gousiou@cern.ch)                                     |
## Website      http://www.ohwr.org/projects/pts                                                  |
## Date         11/01/2013                                                                        |
##-------------------------------------------------------------------------------------------------

##-------------------------------------------------------------------------------------------------
##                               GNU LESSER GENERAL PUBLIC LICENSE                                |
##                              ------------------------------------                              |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either     |
## version 2.1 of the License, or (at your option) any later version.                             |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;       |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.      |
## See the GNU Lesser General Public License for more details.                                    |
## You should have received a copy of the GNU Lesser General Public License along with this       |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html                     |
##-------------------------------------------------------------------------------------------------

##-------------------------------------------------------------------------------------------------
##                                            Import                                             --
##-------------------------------------------------------------------------------------------------


# Import system modules
import sys
import time
import os
import math
import pylab
from pylab import *
from datetime import datetime


# Add common modules location tp path
sys.path.append('../../../')
sys.path.append('../../../gnurabbit/python/')
sys.path.append('../../../common/')

# Import common modules
from ptsexcept import *
import rr
import csr


# Import specific modules
import fmc_tdc
sys.path.append('../../../common/fmc_delay/software/python/')
import fdelay_lib


##-------------------------------------------------------------------------------------------------
##                                             Main                                              --
##-------------------------------------------------------------------------------------------------

def main (default_directory='.'):

    # Constants declaration
    FMC_TDC_ADDR             = '1a39:0004/1a39:0004@0001:0000'#'1a39:0004/1a39:0004@000B:0000'
    FMC_TDC_BITSTREAM_PATH   = '../firmwares/tdc_allothertests.bit'#tdc_fpga_in.bit'
    FMC_DELAY_ADDR           = '018d:0000/018d:0000@0002:0000'#'1a39:0004/1a39:0004@0005:0000'
    FMC_DELAY_BITSTREAM_PATH = '../firmwares/fmc_delay_spec.bin'
    FPGA_LOADER_PATH         = '../../../gnurabbit/user/fpga_loader'

    FMC_TDC_CHANNEL_NB  = 5
    ERRFLAG_BASE        = 0xC0000
    ERRFLAG_REG         = 0x48
    RST_ERRFLAG_REG     = 0x4C

    # SPEC object declaration
    spec = rr.Gennum()


#-----> TDC
    # Bind SPEC object to FMC TDC card
    print "\n-------------------------------------------------------------------"
    print "----------------------------- FMC TDC -----------------------------"
    print "-------------------- TDC ACAM ERROR FLAG test ---------------------\n"
    print ("Testing of the ACAM TDC_ERR signal. The ERR flag is configured to\n"
           "get activated upon overflow on the interface FIFOs; an overflow\n"
           "occurs when the timestamps arrival rate is higher than 31.25MHz.\n"
           "The test is using the Fine Delay as pulse generator sending pulses\n"
           "to the all the TDC channels with a total rate of 100MHz and is\n"
           "monitiring the TDC_ERR signal.\n")

    print "\n_______________________________Info______________________________\n"
    print "FMC TDC address to parse: %s"%(FMC_TDC_ADDR)
    for name, value in spec.parse_addr(FMC_TDC_ADDR).iteritems():
        print "%s:0x%04X"%(name, value)
    spec.bind(FMC_TDC_ADDR)
    ERRFLAG_BASE = csr.CCSR(spec, ERRFLAG_BASE)

    # Load FMC TDC firmware
    print "\n_________________________Initialisations_________________________\n"
    print "Loading FMC TDC firmware...",
    firmware_loader = os.path.join(default_directory, FPGA_LOADER_PATH)
    bitstream = os.path.join(default_directory, FMC_TDC_BITSTREAM_PATH)
    os.system(firmware_loader + ' ' + bitstream)
    time.sleep(1)
    firmware_loader = os.path.join(default_directory, FPGA_LOADER_PATH)
    bitstream = os.path.join(default_directory, FMC_TDC_BITSTREAM_PATH)
    os.system(firmware_loader + ' ' + bitstream)
    time.sleep(1)
    print "Firmware loaded!"

    # TDC object declaration
    tdc = fmc_tdc.CFMCTDC(spec)

    # Check bitsteam type
    bitstream_type = tdc.read_bitstream_type()
    if(bitstream_type == 0xFFFFFFFF):
        msg = ("FATAL ERROR: No access to TDC core")
        os.close(spec.fd)
        print (msg)
        raise PtsCritical (msg)
    if(bitstream_type != 0x1):
        msg = ("FATAL ERROR: Wrong bitstream type loaded")
        os.close(spec.fd)
        print (msg)
        raise PtsCritical (msg)
    else:
        print('Access to TDC core OK')

    # Configure ACAM and TDC core registers
    print "\n__________________________Configuration__________________________\n"
    tdc.config_acam()
    time.sleep(1)
    tdc.reset_acam()
    acam_status_test = tdc.read_acam_status()-0xC4000800
    if acam_status_test == 0:
        print "ACAM IC8: Status register OK"
    else:
        msg = ("ERROR: ACAM IC8: No communication")
        os.close(spec.fd)
        print (msg)
        raise PtsError (msg)
    acam_readback_regs = []
    acam_readback_regs = tdc.readback_acam_config()
    for i in range(len(tdc.ACAM_READBACK_REGS)): 
        if (acam_readback_regs[i] == tdc.ACAM_READBACK_REGS[i]):
            print "ACAM IC8: reg 0x%02X: 0x%08X OK"%(tdc.ACAM_READBACK_ADDR[i], acam_readback_regs[i])
        else:
            msg = ("ERROR: ACAM IC8: Configuration registers failure; reg 0x%2X: received 0x%8X, expected 0x%8X"%(tdc.ACAM_READBACK_ADDR[i], acam_readback_regs[i], tdc.ACAM_READBACK_REGS[i]))
            os.close(spec.fd)
            print (msg)
            raise PtsError (msg)

    # Enable terminations of channels 1,2,3,4
    # channels 4 and 5 are receiving the same Fine Delay pulse; only channel 4 termination activated
    tdc.enable_channels()
    tdc.channel_term(1, 1)
    tdc.channel_term(2, 1)
    tdc.channel_term(3, 1)
    tdc.channel_term(5, 1)

    # Enable timestamps aquisition (TDC_START_FPGA pulse sent at this step) 
    tdc.start_acq()

    # Check Effflag register
    ERRFLAG_BASE.wr_reg(RST_ERRFLAG_REG,0x1)
    ERRFLAG_BASE.wr_reg(RST_ERRFLAG_REG,0x0)
    acam_errflag_init = ERRFLAG_BASE.rd_reg(ERRFLAG_REG)
    if acam_errflag_init != 0:
        msg = ("ACAM Error Flag initial value: 0x%08X" %(acam_errflag_init))
        os.close(spec.fd)
        print (msg)
        raise PtsError (msg) 
    else:
        print ("ACAM Error Flag initial value: 0x%08X OK" %(acam_errflag_init))


#-----> Fine Delay
    # Bind SPEC object to FMC Fine Delay card
    print "\n___________________________Fine Delay____________________________"
    print "\nFine Delay initializations.."
    print "Fine Delay address to parse %s"%(FMC_DELAY_ADDR)
    for name, value in spec.parse_addr(FMC_DELAY_ADDR).iteritems():
        print "%s:0x%04X"%(name, value)
    spec.bind(FMC_DELAY_ADDR)

    # Load FMC Fine Delay firmware
    print "\nLoading FMC Fine Delay firmware...",
    sys.stdout.flush()
    firmware_loader = os.path.join(default_directory, FPGA_LOADER_PATH)
    bitstream = os.path.join(default_directory, FMC_DELAY_BITSTREAM_PATH)
    os.system(firmware_loader + ' ' + bitstream)
    time.sleep(1)
    print "Firmware loaded!"

    # Fine Delay object declaration
    try:
        fdelay = fdelay_lib.FineDelay(spec.get_fd())
    except:
        msg = ("ERROR: Fine Delay board Initiliazation failed")
        os.close(spec.fd)
        print (msg)
        raise PtsError (msg)

    # Set UTC and Coarse time in the Fine Delay
    fdelay.set_time(0, 0)
    fd_time = fdelay_lib.fd_timestamp()
    fd_time = fdelay.get_time()

    # Configure the Fine Delay as a pulse generator
    enable         = 1
    t_start_coarse = 0
    width          = 50000  # pulse width 50 ns
    delta          = 100000 # rising edges every 100 ns
    count          = 1000

    # sending pulses to all the channels, so as to trigger the Error Flag of the Interface FIFOs
    print "\n____________________Fine Delay sending pulses____________________"
    print "\n...pulses being sent to all the channels at a rate > 40MHz\n"
    t_start_utc = fdelay.get_time().utc+1
    fdelay.conf_pulsegen(1, enable, t_start_utc, t_start_coarse, width, delta, count)
    fdelay.conf_pulsegen(2, enable, t_start_utc, t_start_coarse, width, delta, count)
    fdelay.conf_pulsegen(3, enable, t_start_utc, t_start_coarse, width, delta, count)
    fdelay.conf_pulsegen(4, enable, t_start_utc, t_start_coarse, width, delta, count)

    time.sleep(5)

#-----> TDC
    # Bind SPEC object to FMC TDC card
    spec.bind(FMC_TDC_ADDR)

    # Check if timestamps arrived
    print "\n______________________ACAM ErrorFlag test________________________\n"
    print "The time now is                   : %s" %datetime.now()
    print "The temperature now is            : %3.3f°C" %tdc.mezz_get_temp()
    print "Fine Delay sent                   : 1000 pulses to each TDC channel"
    print "TDC Write pointer                 : %d"%(tdc.get_pointer())

    if ((ERRFLAG_BASE.rd_reg(ERRFLAG_REG)) != 0):
        print ("ACAM Error Flag                   : 0x%08X OK!" %(ERRFLAG_BASE.rd_reg(ERRFLAG_REG)))
    else:
        msg = ("ERROR: ACAM IC8: Error Flag: not activated as expected")
        os.close(spec.fd)
        print (msg)
        raise PtsError (msg) 


    os.close(spec.fd)
    print "\n-----------------------------------------------------------------\n\n\n"


if __name__ == '__main__' :
    main()
