ApplicationFpga.unroutes 463 Bytes
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Release 12.3 - par M.70d (nt64)
Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.

Tue Feb 01 08:50:01 2011

All signals are completely routed.

WARNING:ParHelpers:361 - There are 7 loadless signals in this design. This design will cause Bitgen to issue DRC
   warnings.

   AFpgaProgClk_io_IBUF
   AFpgaProgCsi_io_IBUF
   AFpgaProgD_iob8<6>_IBUF
   AFpgaProgInit_io_IBUF
   AFpgaProgM_iob2<0>_IBUF
   AFpgaProgM_iob2<1>_IBUF
   AFpgaProgRdWr_io_IBUF