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VME FMC Carrier VFC
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VME FMC Carrier VFC
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DDS not debugged
#4
· opened
Jun 24, 2011
by
Erik van der Bij
feature
CLOSED
1
updated
Feb 12, 2019
VME 2eSST cycles not proven to work
#6
· opened
Jun 24, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
eSATA connector
#16
· opened
Jun 14, 2011
by
Andrea Boccardi
feature
0
updated
Feb 12, 2019
Connect ddr3 address pin 14
#17
· opened
Jun 07, 2011
by
Projects
feature
CLOSED
1
updated
Feb 12, 2019
Foresee the possibility to have the BST signals (2 bytes) and clocks either from the P0 or from the S-FPGA (jumpers?)
#20
· opened
Jun 06, 2011
by
Andrea Boccardi
feature
CLOSED
1
updated
Feb 12, 2019
1-wire chip package should be changed
#26
· opened
Mar 15, 2011
by
Andrea Boccardi
feature
CLOSED
2
updated
Feb 12, 2019
Do not mount PT6914 and PT6915 negative supplies
#30
· opened
Nov 16, 2010
by
Erik van der Bij
feature
CLOSED
2
updated
Feb 12, 2019
Name inversion between the control signals of the P0 HWHIGHBYTE and HWLOWBYTE
#35
· opened
Oct 20, 2010
by
Andrea Boccardi
feature
CLOSED
1
updated
Feb 12, 2019
TTLBunchClk and TTLTClk signals on the P0 are forced as input for the carrier.
#36
· opened
Oct 20, 2010
by
Andrea Boccardi
feature
CLOSED
2
updated
Feb 12, 2019