Introduce the language Manifest variable and use it for Xilinx tools

parent 48714bcc
......@@ -54,6 +54,10 @@ class ManifestParser(ConfigParser):
'help': "What is the action that should be taken if "
"HDLMake is run in auto mode (simulation/synthesis)",
'type': ''},
{'name': 'language',
'default': 'VHDL',
'help': "Default language to be used by the tool ",
'type': ''},
{'name': 'library',
'default': "work",
'help': "Destination library for module's VHDL files",
......@@ -83,11 +83,12 @@ $(TCL_CLOSE)'''
def _get_properties(self):
"""Create the property list"""
syn_properties = self.manifest_dict.get("syn_properties")
language = self.manifest_dict.get("language")
properties = [
['part', '$(SYN_DEVICE)' +
'$(SYN_GRADE)', 'current_project'],
['target_language', 'VHDL', 'current_project'],
['target_language', language, 'current_project'],
['top', '$(TOP_MODULE)', 'get_property srcset [current_run]']]
fetchto = self.manifest_dict.get("fetchto")
if not fetchto is None:
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment