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Hdlmake
Commits
4b43787e
Commit
4b43787e
authored
May 25, 2017
by
Javier D. Garcia-Lasheras
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Improvements on how the .tcl files are cleaned in Makefile
parent
f5fd4714
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8 changed files
with
10 additions
and
7 deletions
+10
-7
diamond.py
hdlmake/tools/diamond.py
+1
-1
ise.py
hdlmake/tools/ise.py
+1
-1
libero.py
hdlmake/tools/libero.py
+1
-1
make_syn.py
hdlmake/tools/make_syn.py
+3
-0
planahead.py
hdlmake/tools/planahead.py
+1
-1
quartus.py
hdlmake/tools/quartus.py
+1
-1
vivado.py
hdlmake/tools/vivado.py
+1
-1
vivado_sim.py
hdlmake/tools/vivado_sim.py
+1
-1
No files found.
hdlmake/tools/diamond.py
View file @
4b43787e
...
...
@@ -53,7 +53,7 @@ class ToolDiamond(ToolSyn):
VHDLFile
:
_LATTICE_SOURCE
.
format
(
'add'
),
VerilogFile
:
_LATTICE_SOURCE
.
format
(
'add'
)}
CLEAN_TARGETS
=
{
'clean'
:
[
"*.sty"
,
"$(PROJECT)"
,
"run.tcl"
],
CLEAN_TARGETS
=
{
'clean'
:
[
"*.sty"
,
"$(PROJECT)"
],
'mrproper'
:
[
"*.jed"
]}
TCL_CONTROLS
=
{
'create'
:
'prj_project new -name $(PROJECT)'
...
...
hdlmake/tools/ise.py
View file @
4b43787e
...
...
@@ -73,7 +73,7 @@ class ToolISE(ToolSyn):
SVFile
:
'xfile add $(sourcefile)'
}
CLEAN_TARGETS
=
{
'clean'
:
[
"xst"
,
"xlnx_auto_0_xdb"
,
"iseconfig _xmsgs"
,
"_ngo"
,
"*.b"
,
"*_summary.html"
,
"*.tcl"
,
"_ngo"
,
"*.b"
,
"*_summary.html"
,
"*.bld"
,
"*.cmd_log"
,
"*.drc"
,
"*.lso"
,
"*.ncd"
,
"*.ngc"
,
"*.ngd"
,
"*.ngr"
,
"*.pad"
,
"*.par"
,
"*.pcf"
,
"*.prj"
,
"*.ptwx"
,
"*.stx"
,
"*.syr"
,
...
...
hdlmake/tools/libero.py
View file @
4b43787e
...
...
@@ -52,7 +52,7 @@ class ToolLibero(ToolSyn):
VHDLFile
:
_LIBERO_SOURCE
.
format
(
'-hdl_source'
),
VerilogFile
:
_LIBERO_SOURCE
.
format
(
'-hdl_source'
)}
CLEAN_TARGETS
=
{
'clean'
:
[
"$(PROJECT)"
,
"run.tcl"
],
CLEAN_TARGETS
=
{
'clean'
:
[
"$(PROJECT)"
],
'mrproper'
:
[
"*.pdb"
,
"*.stp"
]}
TCL_CONTROLS
=
{
...
...
hdlmake/tools/make_syn.py
View file @
4b43787e
...
...
@@ -194,6 +194,9 @@ SYN_POST_{0}_CMD := {2}
self
.
makefile_clean
()
self
.
writeln
(
"
\t\t
"
+
shell
.
del_command
()
+
" project synthesize translate map par bitstream"
)
self
.
writeln
(
"
\t\t
"
+
shell
.
del_command
()
+
" project.tcl synthesize.tcl translate.tcl"
+
" map.tcl par.tcl bitstream.tcl files.tcl"
)
self
.
writeln
()
self
.
makefile_mrproper
()
...
...
hdlmake/tools/planahead.py
View file @
4b43787e
...
...
@@ -48,7 +48,7 @@ class ToolPlanAhead(ToolXilinx):
XMPFile
:
ToolXilinx
.
_XILINX_SOURCE
,
XCOFile
:
ToolXilinx
.
_XILINX_SOURCE
}
CLEAN_TARGETS
=
{
'clean'
:
[
"planAhead_*"
,
"planAhead.*"
,
"run.tcl"
,
CLEAN_TARGETS
=
{
'clean'
:
[
"planAhead_*"
,
"planAhead.*"
,
".Xil"
,
"$(PROJECT).cache"
,
"$(PROJECT).data"
,
" $(PROJECT).runs"
,
"$(PROJECT).ppr"
]}
...
...
hdlmake/tools/quartus.py
View file @
4b43787e
...
...
@@ -73,7 +73,7 @@ class ToolQuartus(ToolSyn):
SVFile
:
_QUARTUS_SOURCE
.
format
(
'VERILOG_FILE'
)
+
_QUARTUS_LIBRARY
}
CLEAN_TARGETS
=
{
'clean'
:
[
"*.rpt"
,
"*.smsg"
,
"
run.tcl"
,
"
*.summary"
,
CLEAN_TARGETS
=
{
'clean'
:
[
"*.rpt"
,
"*.smsg"
,
"*.summary"
,
"*.done"
,
"*.jdi"
,
"*.pin"
,
"*.qws"
,
"db"
,
"incremental_db"
,
"$(PROJECT).qsf"
,
"*.qpf"
],
...
...
hdlmake/tools/vivado.py
View file @
4b43787e
...
...
@@ -59,7 +59,7 @@ class ToolVivado(ToolXilinx):
VHOFile
:
ToolXilinx
.
_XILINX_SOURCE
,
VEOFile
:
ToolXilinx
.
_XILINX_SOURCE
}
CLEAN_TARGETS
=
{
'clean'
:
[
"
run.tcl"
,
"
.Xil"
,
"*.jou"
,
"*.log"
,
"*.pb"
,
CLEAN_TARGETS
=
{
'clean'
:
[
".Xil"
,
"*.jou"
,
"*.log"
,
"*.pb"
,
"$(PROJECT).cache"
,
"$(PROJECT).data"
,
"work"
,
"$(PROJECT).runs"
,
"$(PROJECT).hw"
,
"$(PROJECT).ip_user_files"
,
"$(PROJECT_FILE)"
]}
...
...
hdlmake/tools/vivado_sim.py
View file @
4b43787e
...
...
@@ -43,7 +43,7 @@ class ToolVivadoSim(ToolSim):
HDL_FILES
=
{
VerilogFile
:
''
,
VHDLFile
:
''
,
SVFile
:
''
}
CLEAN_TARGETS
=
{
'clean'
:
[
"
run.tcl"
,
"
.Xil"
,
"*.jou"
,
"*.log"
,
"*.pb"
,
CLEAN_TARGETS
=
{
'clean'
:
[
".Xil"
,
"*.jou"
,
"*.log"
,
"*.pb"
,
"work"
,
"xsim.dir"
],
'mrproper'
:
[
"*.wdb"
,
"*.vcd"
]}
...
...
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