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Hdlmake
Commit 6e92c417 authored by Paweł Szostek's avatar Paweł Szostek
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finish new dep solver implementation

parent 0cbee451
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Showing with 41 additions and 19 deletions
hdlmake/dep_file.py
View file @ 6e92c417
......@@ -55,11 +55,14 @@ class DepRelation(object):
else:
return None
def __str__(self):
def __repr__(self):
dstr = {self.USE: "Use", self.PROVIDE: "Provide"}
ostr = {self.ENTITY: "entity/module", self.PACKAGE: "package", self.INCLUDE: "include/header"}
return "%s %s '%s'" % (dstr[self.direction], ostr[self.rel_type], self.obj_name)
def __hash__(self):
return hash(self.__repr__())
def __eq__(self, other):
return (isinstance(other, self.__class__)
and self.__dict__ == other.__dict__)
......@@ -135,38 +138,48 @@ class File(object):
class DepFile(File):
def __init__(self, file_path, module, include_paths=None):
from module import Module
from new_dep_solver import ParserFactory
assert isinstance(file_path, basestring)
assert isinstance(module, Module)
File.__init__(self, path=file_path, module=module)
self.file_path = file_path
self.rels = set()
self._rels = set()
self.depends_on = set() # set of files that the file depends on, items of type DepFile
self.is_parsed = False
if include_paths is None:
include_paths = []
else:
pass
self.file_path = file_path
self.include_paths = include_paths
parser = ParserFactory().create(self)
parser.parse(self)
def add_relation(self, rel):
self.rels.add(rel)
def _parse_if_needed(self):
from new_dep_solver import ParserFactory
if not self.is_parsed:
parser = ParserFactory().create(self)
parser.parse(self)
#use proxy template here
def __get_rels(self):
self._parse_if_needed()
return self._rels
def __set_rels(self, what):
self._rels = what
# def satisfies_any(self, rels_b):
# assert isinstance(rels_b, list)
# for rel_a in self.rels:
# if not any(map(lambda x: x.satisfies(rel_a), rels_b)):
# return False
# return True
rels = property(__get_rels, __set_rels)
def add_relation(self, rel):
self._rels.add(rel)
def satisfies(self, rel_b):
assert isinstance(rel_b, DepRelation)
self._parse_if_needed()
return any(map(lambda x: x.satisfies(rel_b), self.rels))
def show_relations(self):
self._parse_if_needed()
for r in self.rels:
print(str(r))
......
hdlmake/new_dep_solver.py
View file @ 6e92c417
......@@ -93,8 +93,8 @@ def solve(fileset):
satisfied_by = set()
for dep_file in fset:
if dep_file is investigated_file:
continue
# if dep_file is investigated_file:
# continue
if dep_file.satisfies(rel):
investigated_file.depends_on.add(dep_file)
satisfied_by.add(dep_file)
......@@ -104,7 +104,7 @@ def solve(fileset):
len(satisfied_by),
'\n'.join([file.path for file in list(satisfied_by)]))
elif len(satisfied_by) == 0:
logging.warning("Relation %s not satisfied by any source file", str(rel))
logging.warning("Relation %s in %s not satisfied by any source file" % (str(rel), investigated_file.name))
logging.info("Dependencies solved")
......
hdlmake/vhdl_parser.py
View file @ 6e92c417
......@@ -21,6 +21,7 @@
from new_dep_solver import DepParser
import logging
def _remove_gaps(buf, delims, gap_chars, lower_strings=False):
......@@ -57,6 +58,9 @@ def _remove_gaps(buf, delims, gap_chars, lower_strings=False):
class VHDLParser(DepParser):
def parse(self, dep_file):
from dep_file import DepRelation
if dep_file.is_parsed:
return
logging.info("Parsing %s" % dep_file.path)
content = open(dep_file.file_path, "r")
buf = ""
# stage 1: strip comments
......@@ -156,3 +160,4 @@ class VHDLParser(DepParser):
dep_file.add_relation(DepRelation(g.group(2),
DepRelation.USE,
DepRelation.ENTITY))
dep_file.is_parsed = True
\ No newline at end of file
hdlmake/vlog_parser.py
View file @ 6e92c417
......@@ -31,7 +31,7 @@ from new_dep_solver import DepParser
from dep_file import DepRelation
class VerilogPreprocessor:
class VerilogPreprocessor(object):
# Reserved verilog preprocessor keywords. The list is certainly not full
vpp_keywords = ["define", "line", "include", "elsif", "ifdef", "endif", "else", "undef", "timescale"]
......@@ -45,14 +45,14 @@ class VerilogPreprocessor:
vpp_filedeps = {}
# Verilog `define class
class VL_Define:
class VL_Define(object):
def __init__(self, name, args, expansion):
self.name = name
self.args = args
self.expansion = expansion
# Simple binary stack, for nested `ifdefs evaluation
class VL_Stack:
class VL_Stack(object):
def __init__(self):
self.stack = []
......@@ -532,6 +532,9 @@ class VerilogParser(DepParser):
return buf2
def parse(self, dep_file):
if dep_file.is_parsed:
return
logging.info("Parsing %s" % dep_file.path)
# assert isinstance(dep_file, DepFile), print("unexpected type: " + str(type(dep_file)))
buf = self.preprocessor.preprocess(dep_file)
self.preprocessed = buf[:]
......@@ -557,3 +560,4 @@ class VerilogParser(DepParser):
re.subn(m_inside_module, do_module, buf)
dep_file.add_relation(DepRelation(os.path.basename(dep_file.filename), DepRelation.PROVIDE, DepRelation.INCLUDE))
dep_file.is_parsed = True
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