Programming languages used in this repository

  •   Python
    91.82 %
  •   VHDL
    3.82 %
  •   Verilog
    2.62 %
  •   Makefile
    1.15 %
  •   Tcl
    0.41 %
  •   SystemVerilog
    0.09 %
  •   Stata
    0.06 %
  •   Coq
    0.02 %

Commit statistics for 63139ec6c5fc907bcfac9715562eb1b501e0925d Jan 12 - Apr 04

  • Total: 1100 commits
  • Average per day: 0.4 commits
  • Authors: 24

Commits per day of month

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