Add vhd file generation during build
Every time a bitstream is build, a vhd file should be created.
This vhd file can be used to embed information to the bitstream.
The file should contain (to be discussed):
> 1. Synthesis tool name+version
> 2. Git top-module name+url
> 3. Full git hash of the top-module
> 4. Name of the person synthesizing (unix id)
> 5. Date of the the synthesis
The idea is to be able to read this information from outside the FPGA to uniquely identify a bitstream.