Scalable MAROC Charge Sensitive Readout:da7a323755f0848471fff7477f6a27356ae0b32b commitshttps://ohwr.org/project/maroc_csa/commits/da7a323755f0848471fff7477f6a27356ae0b32b2017-09-25T09:56:05Zhttps://ohwr.org/project/maroc_csa/commit/da7a323755f0848471fff7477f6a27356ae0b32bAdding changes to Python scripts2017-09-25T09:56:05ZDavid CussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/f261b39677d2251f85a516108f105202915d7c69Taking local copy of PyChips2017-09-25T09:51:32ZDavid CussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/2f031cf3cd8ddc51ecc866d48ecba944c54df2a2Connected trigger output to GPIO pin2016-12-01T08:54:04ZDavid CussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/fd60668227092cdf01d492a6ed32164b0af6ae77Repairing code-rot in Maroc example firmware.2016-10-07T16:52:57ZDavid CussansDavid.Cussans@bristol.ac.uk
Modified "demo" to work with newer WhiteRabbit core
Write "simple" example that just uses IPBus and Maroc cores ( no White Rabbit )
Started on the path towards "build out of the box" but not there yet.https://ohwr.org/project/maroc_csa/commit/d79561af657a114fb12200dd810733eff59cfd4cGetting rid of whiteRabbit directory...2016-05-16T14:32:13ZDavid CussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/96ed1886e1d1ae1d72e4e28f8fe8f39635c5b838Copying White Rabbit cores into local repo2016-05-16T14:02:21ZDavid CussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/af18fe26ddef7945cbb166678459c86560e86bfbAdding local copy of WhiteRabbit code2016-05-16T12:35:59ZcussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/191b82ced6e983339e69b49315f81aee3a2aaa6eMoving PyChips inside scripts directory2016-05-16T10:42:33ZcussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/6b43ddd196d197246a0c0c1ff00704e69f234521Updated block diagram to reflect move away from 1 SFP , 1 Phy to 2 SFP2016-04-27T09:10:33ZcussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/6710cc6ea52b36476633cd2a2361d5ea98f7b2afMaking a copy of IPBus into local respository2016-04-15T13:10:30ZcussansDavid.Cussans@bristol.ac.ukhttps://ohwr.org/project/maroc_csa/commit/b5df76857f08b6f16d9773c760292737478c14ebAdding files before Git migration2016-04-15T08:57:18ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@50" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@50</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/991b7e648cc91bad29694d2587a15fde41d9c6edChecking in design files before Git migration2016-04-15T08:47:39ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@49" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@49</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/3e589629e4e913ad88c4845504bbda04b2b264d8Checking in design files before Git migration2016-04-15T08:45:33ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@48" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@48</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/f79f13e79e0d5237c0f699da00fe459dd1fe78ebChecking in files before another attempted Git migration.2016-04-15T08:41:07ZcussansDavid.Cussans@bristol.ac.uk
More firmware development:
Took copies of firmware/hdl/i2c_master_* to avoid having to pull in.
Wrote some test-benches for data mux code:
dummyMarocADC_behavioural.vhd
marocTimeStampMuxArray_tb.vhd
marocTimeStampMux_tb.vhd
marocTriggerTimeStampArray_tb.vhd
marocTriggerTimeStamp_tb.vhd
Added pick-and-place information to BoM
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@47" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@47</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/9ce72440849ca482d43840a9aaaefe6f41682867Checking in timestamp multiplexing code2016-04-06T17:00:32ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@46" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@46</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/f9bf008a90f5fe341daffea99fcf842a47e156b5Committing changes before moving to Git2016-03-24T10:23:54ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@45" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@45</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/3df8f56d96e686ef2b6373dd62143b79b927d871Added external trigger on GPIO. Tidied up firmware. Still doesn't meet timing...2016-03-18T12:13:00ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@44" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@44</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/4608124b782a7e543feccb859e4f1ee98851c066Added some protection against buffer over-run. Unfortunately doesn't work at ...2016-03-18T12:10:36ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@43" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@43</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/d64c82c3940d476534db2e8f0323f2087d5c20ecmarocInterface_rtl.vhd - Added external trigger from GPIO header as well as…2016-03-17T11:24:25ZcussansDavid.Cussans@bristol.ac.ukmarocInterface_rtl.vhd - Added external trigger from GPIO header as well as from DIN41612 connectors
marocTriggerGenerator_rtl.vhd - added attributes to prevent synchronization steps being optimized to a shift register
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@42" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@42</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706
https://ohwr.org/project/maroc_csa/commit/df9b217acd12fecb25e1a6d6904a0b51631137bcEdited import statements to make it easier to more to multiprocess rather tha...2016-03-07T09:48:51ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@41" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@41</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/a4ada180c402913e16b1a631196ab92273e78564Checking in example configuration file.2016-03-03T13:50:53ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@40" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@40</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/c735d6df2ba461b056a9c47596610204a6056987- MarocConfiguration.py - passes configuration file name to MarocSC object and…2016-03-03T13:50:07ZcussansDavid.Cussans@bristol.ac.uk- MarocConfiguration.py - passes configuration file name to MarocSC object and reads from configuration file.
- MarocHistograms.py - replaced print statements with logger.info / logger.debug
- MarocSC.py - debugged so can now read flags, parameters and register values from configuration file.
- takeMarocData.py - added command line switch to set configuration file name
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@39" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@39</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706
https://ohwr.org/project/maroc_csa/commit/e6393c94edc9b49fa1d10cad14848ef14e7a2f91Checking in PyChips address map for takeMarocData.py2016-03-02T17:53:10ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@38" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@38</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/716ff8dbaf7898d25c0af784ca77e1e4372e6d60MarocConfiguration - class that writes to registers in FPGA , including regis...2016-03-02T17:52:04ZcussansDavid.Cussans@bristol.ac.ukMarocConfiguration - class that writes to registers in FPGA , including register that controls interface to MAROC slow control. Reads data to write to slow control from CSV file.
takeMarocData.py - passes number of events to readout thread. Passes file name to recording thread. Waits for threads to finish before exiting
MarocRecording.py - eventually sorted out how to record to a ROOT file. Inefficient at the moment.
MarocSC.py - started to add ability to store register values in CSV file as well as contents of MAROC SC registers.
MarocHistogrammingThread.py,MarocReadoutThread.py,MarocRecordingThread.py,MarocUnpackingThread.py - when readout thread reaches event limit it passes a "special" event along processing pipeline that causes threads to exit.
MarocRunControlThread.py - beginnings of a run-control thread. Not used at the moment.
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@37" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@37</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706
https://ohwr.org/project/maroc_csa/commit/311a7be881288ebed0637ba99c566a7a67107315Adding more Python readout scripts.2016-03-01T13:38:00ZcussansDavid.Cussans@bristol.ac.uk
takeMarocData - multi-threaded top level script to take data.
MarocReadoutThread , MarocHistogrammingThread , MarocRecordingThread - classes that inherit from Threading class
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@36" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@36</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/227bbaa44b6b0a29cd1c6c214ea393659179aec1Checking in current code. 2016-01-29T15:07:51ZcussansDavid.Cussans@bristol.ac.uk
Some documentation changes
Changed Slow control shift register to have optional reset before shifting data.
( Still at least one bug - doesn't store data shifted out of MAROC correctly )
Added register stages to risingEdgeDetect
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@35" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@35</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/e48ef112197ede30444490d08af30b6b132a5ddbAdding scripts before modifying MarocSC.py2015-12-17T14:32:12ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@34" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@34</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/8a83cba770280a3dafba8f04d994f2650e971a54Comitting changes for working demo version2015-05-26T15:43:53ZcussansDavid.Cussans@bristol.ac.uk
* marocInterface_rtl.vhd - detects the falling edge of status from marocADC
* circuit to detect falling edge of status hdl/fallingEdgeDetect_rtl.vhd
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@33" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@33</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/bd6c7e83df4dc6ad324355b25e874d8c0280f511Starting to write simulation test-bench2015-03-31T11:56:45ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@32" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@32</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/426605636c42dcc33870a63824c8929df288793eStarting to write simulation test-bench2015-03-31T11:56:30ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@31" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@31</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/de1cbaf1e5745b24d4ed40687c02ca10447f662fEdited UCF to specify termination of some of the LVDS lines.2015-03-30T18:34:10ZcussansDavid.Cussans@bristol.ac.uk
Edited pc049a_top.vhd in order to only build the IPBus ( not the White Rabbit ) cores by default. Reduces power dissipation and keeps chip cooler.
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@30" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@30</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/b31f50a2081b4c0cb00c7c1d9f841d75c43059c6Comissioning boards.2015-03-27T14:54:09ZcussansDavid.Cussans@bristol.ac.uk
* Took pictures of assembled boards.
* Exported netlist from Circuit schematic.
* Changed clocks to be 31.25MHz IPBus clock.
* General tidying. Unfortunately, latest design doesn't respond to "ping"....
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@29" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@29</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/dfeb5646f2b1615d56eb6ffb65cd60b4489defb0Checking in files before copying to GIT2015-03-23T10:24:25ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@27" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@27</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/85443d56a92f7516fe57b39f3bf972af6146b145Checking in files before copying to GIT2015-03-23T10:15:55ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@26" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@26</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/70e06b2c2cc1e0fe41983e8a271779962768c51dTidying artwork2015-02-23T12:45:45ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@25" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@25</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/c17c65fc6ba01de0023f61a9c354d0a6994e610bAdding artwork after glossing and power supply capacitor changes2015-02-23T12:44:43ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@24" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@24</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/b4cce114bf4a3ca55e283cc14b53ce224910779eAdding artwork after glossing and power supply capacitor changes2015-02-23T12:43:56ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@23" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@23</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/8c9cd0d7143fea8b1d0511b747161b76e4049fcfChanging clearanges to get ground pins on DIN connectors connected to ground…2015-02-12T09:32:53ZcussansDavid.Cussans@bristol.ac.ukChanging clearanges to get ground pins on DIN connectors connected to ground planes on layers 7 , 10
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@22" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@22</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706
https://ohwr.org/project/maroc_csa/commit/e1318150a24e26b1a32a21bd7d677b3bf0ee7844Minor changes following PCB checking2015-02-12T08:58:35ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@21" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@21</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706https://ohwr.org/project/maroc_csa/commit/1bad2accf96eef8df78c5b288559d4ab29082decAdding artwork from final files before manufacture2015-02-11T15:26:18ZcussansDavid.Cussans@bristol.ac.uk
git-svn-id: <a href="https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@20" rel="nofollow noreferrer noopener" target="_blank">https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@20</a> e1591323-3689-4d5a-aa31-d1a7cbdc5706