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MasterFIP - Gateware
Commit 554a78f4 authored by Evangelia Gousiou's avatar Evangelia Gousiou
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added doc folder and code review presentation

parent 5c8b194c
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syn/spec/spec_masterfip_mt.xise
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......@@ -1005,10 +1005,6 @@
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../rtl/onewire_interf.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../ip_cores/general-cores/modules/common/gc_ds182x_interface.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="190"/>
<association xil_pn:name="Implementation" xil_pn:seqID="169"/>
......
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