Commit fd652d45 authored by Evangelia Gousiou's avatar Evangelia Gousiou

added more bits to tx and rx bytes counters so as to be compatible with the PTS…

added more bits to tx and rx bytes counters so as to be compatible with the PTS that needs to send 1024 bytes.
parent 38045178
......@@ -491,7 +491,7 @@ begin
speed_i => speed,
rx_d_a_i => fd_rxd_a_i,
rx_byte_index_o => rx_byte_index, -- current byte index
rx_word_index_o => reg_to_mt.rx_stat_curr_word_indx_i,
rx_word_index_o => reg_to_mt.rx_stat_curr_word_indx_i(C_FRAME_WORDS_CNT_LGTH-1 downto 0),
rx_ctrl_byte_o => reg_to_mt.rx_payld_ctrl_i,
rx_frame_o => rx_frame,
rx_fss_crc_fes_ok_p_o => rx_frame_ok_p,
......@@ -520,7 +520,7 @@ begin
else
if rx_frame_ok_p = '1' then
reg_to_mt.rx_stat_frame_ok_i <= rx_frame_ok_p;
reg_to_mt.rx_stat_bytes_num_i <= rx_byte_index - 3; -- data payload, without FSS, CTRL,
reg_to_mt.rx_stat_bytes_num_i(C_FRAME_BYTES_CNT_LGTH-1 downto 0) <= rx_byte_index - 3; -- data payload, without FSS, CTRL,
end if; -- CRC, FES
end if;
end if;
......@@ -576,11 +576,12 @@ begin
(clk_i => clk_i,
rst_i => tx_rst,
speed_i => speed,
tx_bytes_num_i => reg_from_mt.tx_ctrl_bytes_num_o,-- num of bytes to serialize; sampled upon tx_start_p
tx_bytes_num_i => reg_from_mt.tx_ctrl_bytes_num_o(C_FRAME_BYTES_CNT_LGTH-1 downto 0),-- num of bytes to serialize; sampled upon tx_start_p
tx_start_p_i => reg_from_mt.tx_ctrl_start_o, -- monostable, 1-clk-tick-long pulse
tx_frame_i => tx_frame,
tx_ctrl_byte_i => reg_from_mt.tx_payld_ctrl_o,
tx_byte_index_o => reg_to_mt.tx_stat_curr_byte_indx_i,-- indx of current byte being serialized,
tx_byte_index_o => reg_to_mt.tx_stat_curr_byte_indx_i(C_FRAME_BYTES_CNT_LGTH-1 downto 0),
-- indx of current byte being serialized,
-- counting starts from 0 (indx 0 is
-- the Control byte) up to 262 bytes
tx_end_p_o => tx_completed_p,
......
......@@ -3,7 +3,7 @@
---------------------------------------------------------------------------------------
-- File : masterfip_wbgen2_csr.vhd
-- Author : auto-generated by wbgen2 from masterfip_csr.wb
-- Created : 04/12/17 12:25:04
-- Created : 04/21/17 11:57:29
-- Standard : VHDL'87
---------------------------------------------------------------------------------------
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE masterfip_csr.wb
......@@ -67,7 +67,7 @@ signal masterfip_tx_ctrl_rst_dly0 : std_logic ;
signal masterfip_tx_ctrl_rst_int : std_logic ;
signal masterfip_tx_ctrl_start_dly0 : std_logic ;
signal masterfip_tx_ctrl_start_int : std_logic ;
signal masterfip_tx_ctrl_bytes_num_int : std_logic_vector(8 downto 0);
signal masterfip_tx_ctrl_bytes_num_int : std_logic_vector(15 downto 0);
signal masterfip_rx_ctrl_rst_dly0 : std_logic ;
signal masterfip_rx_ctrl_rst_int : std_logic ;
signal masterfip_tx_payld_ctrl_int : std_logic_vector(7 downto 0);
......@@ -188,7 +188,7 @@ begin
masterfip_silen_start_int <= '0';
masterfip_tx_ctrl_rst_int <= '0';
masterfip_tx_ctrl_start_int <= '0';
masterfip_tx_ctrl_bytes_num_int <= "000000000";
masterfip_tx_ctrl_bytes_num_int <= "0000000000000000";
masterfip_rx_ctrl_rst_int <= '0';
masterfip_tx_payld_ctrl_int <= "00000000";
masterfip_tx_payld_reg1_int <= "00000000000000000000000000000000";
......@@ -523,24 +523,17 @@ begin
if (wb_we_i = '1') then
masterfip_tx_ctrl_rst_int <= wrdata_reg(0);
masterfip_tx_ctrl_start_int <= wrdata_reg(1);
masterfip_tx_ctrl_bytes_num_int <= wrdata_reg(16 downto 8);
masterfip_tx_ctrl_bytes_num_int <= wrdata_reg(23 downto 8);
end if;
rddata_reg(0) <= '0';
rddata_reg(1) <= '0';
rddata_reg(16 downto 8) <= masterfip_tx_ctrl_bytes_num_int;
rddata_reg(23 downto 8) <= masterfip_tx_ctrl_bytes_num_int;
rddata_reg(2) <= 'X';
rddata_reg(3) <= 'X';
rddata_reg(4) <= 'X';
rddata_reg(5) <= 'X';
rddata_reg(6) <= 'X';
rddata_reg(7) <= 'X';
rddata_reg(17) <= 'X';
rddata_reg(18) <= 'X';
rddata_reg(19) <= 'X';
rddata_reg(20) <= 'X';
rddata_reg(21) <= 'X';
rddata_reg(22) <= 'X';
rddata_reg(23) <= 'X';
rddata_reg(24) <= 'X';
rddata_reg(25) <= 'X';
rddata_reg(26) <= 'X';
......@@ -556,7 +549,7 @@ begin
end if;
rddata_reg(0) <= regs_i.tx_stat_stop_i;
rddata_reg(8) <= regs_i.tx_stat_ena_i;
rddata_reg(17 downto 9) <= regs_i.tx_stat_curr_byte_indx_i;
rddata_reg(31 downto 16) <= regs_i.tx_stat_curr_byte_indx_i;
rddata_reg(1) <= 'X';
rddata_reg(2) <= 'X';
rddata_reg(3) <= 'X';
......@@ -564,20 +557,13 @@ begin
rddata_reg(5) <= 'X';
rddata_reg(6) <= 'X';
rddata_reg(7) <= 'X';
rddata_reg(18) <= 'X';
rddata_reg(19) <= 'X';
rddata_reg(20) <= 'X';
rddata_reg(21) <= 'X';
rddata_reg(22) <= 'X';
rddata_reg(23) <= 'X';
rddata_reg(24) <= 'X';
rddata_reg(25) <= 'X';
rddata_reg(26) <= 'X';
rddata_reg(27) <= 'X';
rddata_reg(28) <= 'X';
rddata_reg(29) <= 'X';
rddata_reg(30) <= 'X';
rddata_reg(31) <= 'X';
rddata_reg(9) <= 'X';
rddata_reg(10) <= 'X';
rddata_reg(11) <= 'X';
rddata_reg(12) <= 'X';
rddata_reg(13) <= 'X';
rddata_reg(14) <= 'X';
rddata_reg(15) <= 'X';
ack_sreg(0) <= '1';
ack_in_progress <= '1';
when "00010010" =>
......@@ -679,19 +665,12 @@ begin
rddata_reg(0) <= regs_i.rx_stat_pream_ok_i;
rddata_reg(1) <= regs_i.rx_stat_frame_ok_i;
rddata_reg(2) <= regs_i.rx_stat_frame_crc_err_i;
rddata_reg(16 downto 8) <= regs_i.rx_stat_bytes_num_i;
rddata_reg(23 downto 8) <= regs_i.rx_stat_bytes_num_i;
rddata_reg(3) <= 'X';
rddata_reg(4) <= 'X';
rddata_reg(5) <= 'X';
rddata_reg(6) <= 'X';
rddata_reg(7) <= 'X';
rddata_reg(17) <= 'X';
rddata_reg(18) <= 'X';
rddata_reg(19) <= 'X';
rddata_reg(20) <= 'X';
rddata_reg(21) <= 'X';
rddata_reg(22) <= 'X';
rddata_reg(23) <= 'X';
rddata_reg(24) <= 'X';
rddata_reg(25) <= 'X';
rddata_reg(26) <= 'X';
......@@ -705,8 +684,7 @@ begin
when "00011000" =>
if (wb_we_i = '1') then
end if;
rddata_reg(6 downto 0) <= regs_i.rx_stat_curr_word_indx_i;
rddata_reg(7) <= 'X';
rddata_reg(7 downto 0) <= regs_i.rx_stat_curr_word_indx_i;
rddata_reg(8) <= 'X';
rddata_reg(9) <= 'X';
rddata_reg(10) <= 'X';
......
......@@ -3,7 +3,7 @@
---------------------------------------------------------------------------------------
-- File : masterfip_wbgen2_pkg.vhd
-- Author : auto-generated by wbgen2 from masterfip_csr.wb
-- Created : 04/12/17 12:25:04
-- Created : 04/21/17 11:57:29
-- Standard : VHDL'87
---------------------------------------------------------------------------------------
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE masterfip_csr.wb
......@@ -31,7 +31,7 @@ package masterfip_wbgen2_pkg is
silen_time_cnt_i : std_logic_vector(30 downto 0);
tx_stat_stop_i : std_logic;
tx_stat_ena_i : std_logic;
tx_stat_curr_byte_indx_i : std_logic_vector(8 downto 0);
tx_stat_curr_byte_indx_i : std_logic_vector(15 downto 0);
fd_wdg_i : std_logic;
fd_cd_i : std_logic;
fd_wdg_tstamp_i : std_logic_vector(31 downto 0);
......@@ -40,8 +40,8 @@ package masterfip_wbgen2_pkg is
rx_stat_pream_ok_i : std_logic;
rx_stat_frame_ok_i : std_logic;
rx_stat_frame_crc_err_i : std_logic;
rx_stat_bytes_num_i : std_logic_vector(8 downto 0);
rx_stat_curr_word_indx_i : std_logic_vector(6 downto 0);
rx_stat_bytes_num_i : std_logic_vector(15 downto 0);
rx_stat_curr_word_indx_i : std_logic_vector(7 downto 0);
rx_stat_crc_err_cnt_i : std_logic_vector(31 downto 0);
rx_payld_ctrl_i : std_logic_vector(7 downto 0);
rx_payld_reg1_i : std_logic_vector(31 downto 0);
......@@ -233,7 +233,7 @@ package masterfip_wbgen2_pkg is
silen_start_o : std_logic;
tx_ctrl_rst_o : std_logic;
tx_ctrl_start_o : std_logic;
tx_ctrl_bytes_num_o : std_logic_vector(8 downto 0);
tx_ctrl_bytes_num_o : std_logic_vector(15 downto 0);
rx_ctrl_rst_o : std_logic;
tx_payld_ctrl_o : std_logic_vector(7 downto 0);
tx_payld_reg1_o : std_logic_vector(31 downto 0);
......
#!/bin/bash
wbgen2 -V master_wbgen2_csr.vhd -H record -p master_wbgen2_pkg.vhd -s defines -C master_wbgen2_csr.h -D master_wbgen2_csr.html master_csr.wb
wbgen2 -V masterfip_wbgen2_csr.vhd -H record -p masterfip_wbgen2_pkg.vhd -s defines -C masterfip_wbgen2_csr.h -D masterfip_wbgen2_csr.html masterfip_csr.wb
echo ""
echo "Moving WB generated files to the following locations..."
......
......@@ -461,7 +461,7 @@ peripheral {
256 Data bytes, the number of bytes to serialize = 263 (Control byte+6 address bytes+256 Data bytes)";
prefix = "bytes_num";
type = SLV;
size = 9;
size = 16; -- under normal conditions the value should be max 262
align = 8;
access_bus = READ_WRITE;
access_dev = READ_ONLY;
......@@ -505,7 +505,8 @@ peripheral {
and counts up to 262 for the max frame (counting stops before the CRC bytes)";
prefix = "curr_byte_indx";
type = SLV;
size = 9;
align = 8;
size = 16; -- under normal conditions the value should be max 262
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
};
......@@ -664,7 +665,7 @@ peripheral {
OR upon a rx_ctrl_rst OR upon a rst_core).";
prefix = "bytes_num";
type = SLV;
size = 9;
size = 16; -- under normal conditions the value should be max 262
align = 8;
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
......@@ -686,7 +687,7 @@ peripheral {
The register keeps its value until a reset of the deserializer (this takes place automatically upon the activation of the serializer,\
OR upon a rx_ctrl_rst OR upon a rst_core).";
type = SLV;
size = 7;
size = 8; -- under normal conditions the value should be max 67
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
};
......
......@@ -3,7 +3,7 @@
* File : masterfip_wbgen2_csr.h
* Author : auto-generated by wbgen2 from masterfip_csr.wb
* Created : 04/12/17 12:25:05
* Created : 04/21/17 11:57:29
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE masterfip_csr.wb
......@@ -147,10 +147,10 @@
#define MASTERFIP_TX_CTRL_START WBGEN2_GEN_MASK(1, 1)
/* definitions for field: tx number of bytes in reg: tx ctrl */
#define MASTERFIP_TX_CTRL_BYTES_NUM_MASK WBGEN2_GEN_MASK(8, 9)
#define MASTERFIP_TX_CTRL_BYTES_NUM_MASK WBGEN2_GEN_MASK(8, 16)
#define MASTERFIP_TX_CTRL_BYTES_NUM_SHIFT 8
#define MASTERFIP_TX_CTRL_BYTES_NUM_W(value) WBGEN2_GEN_WRITE(value, 8, 9)
#define MASTERFIP_TX_CTRL_BYTES_NUM_R(reg) WBGEN2_GEN_READ(reg, 8, 9)
#define MASTERFIP_TX_CTRL_BYTES_NUM_W(value) WBGEN2_GEN_WRITE(value, 8, 16)
#define MASTERFIP_TX_CTRL_BYTES_NUM_R(reg) WBGEN2_GEN_READ(reg, 8, 16)
/* definitions for register: tx status */
......@@ -161,10 +161,10 @@
#define MASTERFIP_TX_STAT_ENA WBGEN2_GEN_MASK(8, 1)
/* definitions for field: tx status current byte index in reg: tx status */
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_MASK WBGEN2_GEN_MASK(9, 9)
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_SHIFT 9
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_W(value) WBGEN2_GEN_WRITE(value, 9, 9)
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_R(reg) WBGEN2_GEN_READ(reg, 9, 9)
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_MASK WBGEN2_GEN_MASK(16, 16)
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_SHIFT 16
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_W(value) WBGEN2_GEN_WRITE(value, 16, 16)
#define MASTERFIP_TX_STAT_CURR_BYTE_INDX_R(reg) WBGEN2_GEN_READ(reg, 16, 16)
/* definitions for register: FielDrive wdgn, cdn */
......@@ -197,10 +197,10 @@
#define MASTERFIP_RX_STAT_FRAME_CRC_ERR WBGEN2_GEN_MASK(2, 1)
/* definitions for field: rx number of payload bytes in reg: rx status */
#define MASTERFIP_RX_STAT_BYTES_NUM_MASK WBGEN2_GEN_MASK(8, 9)
#define MASTERFIP_RX_STAT_BYTES_NUM_MASK WBGEN2_GEN_MASK(8, 16)
#define MASTERFIP_RX_STAT_BYTES_NUM_SHIFT 8
#define MASTERFIP_RX_STAT_BYTES_NUM_W(value) WBGEN2_GEN_WRITE(value, 8, 9)
#define MASTERFIP_RX_STAT_BYTES_NUM_R(reg) WBGEN2_GEN_READ(reg, 8, 9)
#define MASTERFIP_RX_STAT_BYTES_NUM_W(value) WBGEN2_GEN_WRITE(value, 8, 16)
#define MASTERFIP_RX_STAT_BYTES_NUM_R(reg) WBGEN2_GEN_READ(reg, 8, 16)
/* definitions for register: rx current word index */
......
......@@ -4089,7 +4089,7 @@ masterfip_tx_ctrl_start_o
</td>
<td class="td_pblock_right">
masterfip_tx_ctrl_bytes_num_o[8:0]
masterfip_tx_ctrl_bytes_num_o[15:0]
</td>
<td class="td_arrow_right">
&rArr;
......@@ -4174,7 +4174,7 @@ masterfip_tx_stat_ena_i
</td>
<td class="td_pblock_right">
masterfip_tx_stat_curr_byte_indx_i[8:0]
masterfip_tx_stat_curr_byte_indx_i[15:0]
</td>
<td class="td_arrow_right">
&lArr;
......@@ -4548,7 +4548,7 @@ masterfip_rx_stat_frame_crc_err_i
</td>
<td class="td_pblock_right">
masterfip_rx_stat_bytes_num_i[8:0]
masterfip_rx_stat_bytes_num_i[15:0]
</td>
<td class="td_arrow_right">
&lArr;
......@@ -4599,7 +4599,7 @@ masterfip_rx_stat_bytes_num_i[8:0]
</td>
<td class="td_pblock_right">
masterfip_rx_stat_curr_word_indx_i[6:0]
masterfip_rx_stat_curr_word_indx_i[7:0]
</td>
<td class="td_arrow_right">
&lArr;
......@@ -15910,29 +15910,29 @@ TX_CTRL
</td>
</tr>
<tr>
<td class="td_unused">
-
<td style="border: solid 1px black;" colspan=8 class="td_field">
BYTES_NUM[15:8]
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td style="border: solid 1px black;" colspan=1 class="td_field">
BYTES_NUM[8:8]
<td >
</td>
</tr>
</table>
......@@ -16122,29 +16122,29 @@ TX_STAT
</td>
</tr>
<tr>
<td class="td_unused">
-
<td style="border: solid 1px black;" colspan=8 class="td_field">
CURR_BYTE_INDX[15:8]
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
</tr>
</table>
......@@ -16176,26 +16176,26 @@ TX_STAT
</td>
</tr>
<tr>
<td class="td_unused">
-
<td style="border: solid 1px black;" colspan=8 class="td_field">
CURR_BYTE_INDX[7:0]
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td style="border: solid 1px black;" colspan=2 class="td_field">
CURR_BYTE_INDX[8:7]
<td >
</td>
<td >
......@@ -16230,29 +16230,29 @@ CURR_BYTE_INDX[8:7]
</td>
</tr>
<tr>
<td style="border: solid 1px black;" colspan=7 class="td_field">
CURR_BYTE_INDX[6:0]
<td class="td_unused">
-
</td>
<td style="border: solid 1px black;" colspan=1 class="td_field">
ENA
<td class="td_unused">
-
</td>
<td >
<td class="td_unused">
-
</td>
<td >
<td class="td_unused">
-
</td>
<td >
<td class="td_unused">
-
</td>
<td >
<td class="td_unused">
-
</td>
<td >
<td class="td_unused">
-
</td>
<td >
<td style="border: solid 1px black;" colspan=1 class="td_field">
ENA
</td>
</tr>
</table>
......@@ -17739,29 +17739,29 @@ RX_STAT
</td>
</tr>
<tr>
<td class="td_unused">
-
<td style="border: solid 1px black;" colspan=8 class="td_field">
BYTES_NUM[15:8]
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td class="td_unused">
-
<td >
</td>
<td style="border: solid 1px black;" colspan=1 class="td_field">
BYTES_NUM[8:8]
<td >
</td>
</tr>
</table>
......@@ -18117,11 +18117,11 @@ RX_STAT_CURR_WORD_INDX
</td>
</tr>
<tr>
<td class="td_unused">
-
<td style="border: solid 1px black;" colspan=8 class="td_field">
RX_STAT_CURR_WORD_INDX[7:0]
</td>
<td style="border: solid 1px black;" colspan=7 class="td_field">
RX_STAT_CURR_WORD_INDX[6:0]
<td >
</td>
<td >
......
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