Changed python tests to match new FMC_worldFIP v3

0e2e9c99 · Marek Gumiński · 790f6bf9 · 0e2e9c99 · 0e2e9c99 · 0e2e9c99
Commit 0e2e9c99 authored Mar 07, 2017 by Marek Gumiński
8 changed files
--- a/python/fmcmasterfip.py
+++ b/python/fmcmasterfip.py
@@ -422,6 +422,7 @@ class fmcmasterfip:
        util.info_msg("Speed  : 0x%08X"%(self.fipcore.read_regname('speed')) )

    def get_bus_freq(self):
+        print self.fipcore.read_regname('speed')
        return self.freq_options[ self.fipcore.read_regname('speed') ]

    

--- a/python/regs/carrier_addrtable.py
+++ b/python/regs/carrier_addrtable.py
 #  Register definitions for slave core: Carrier control and status registers
 #
-#  * File           : /home/gumas/projects/cti/fmcmasterfip/python/regs/carrier_addrtable.py
-#  * Author         : auto-generated by wbgen2 from /home/gumas/projects/cti/fmcmasterfip/gateware/rtl/wbgen/carrier_csr.wb
-#  * Created        : Tue Jun  7 16:15:19 2016
+#  * File           : /home/gumas/projects/cti/pts_masterfip/pts/fmcmasterfip/python/regs/carrier_addrtable.py
+#  * Author         : auto-generated by wbgen2 from /home/gumas/projects/cti/pts_masterfip/pts/fmcmasterfip/gateware/rtl/wbgen/carrier_csr.wb
+#  * Created        : Tue Mar  7 12:59:04 2017
 #
-#    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE /home/gumas/projects/cti/fmcmasterfip/gateware/rtl/wbgen/carrier_csr.wb
+#    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE /home/gumas/projects/cti/pts_masterfip/pts/fmcmasterfip/gateware/rtl/wbgen/carrier_csr.wb
 #    DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
 #


--- a/python/regs/masterfip_addrtable.htm
+++ b/python/regs/masterfip_addrtable.htm
@@ -3468,6 +3468,23 @@ mf_ext_sync_p_cnt_rst_o
 </td>
 <td  class="td_pblock_left">

+</td>
+<td  class="td_sym_center">
+
+</td>
+<td  class="td_pblock_right">
+mf_ext_sync_fpga_io_dir_o
+</td>
+<td  class="td_arrow_right">
+&rarr;
+</td>
+</tr>
+<tr>
+<td  class="td_arrow_left">
+
+</td>
+<td  class="td_pblock_left">
+
 </td>
 <td  class="td_sym_center">
 &nbsp;
@@ -12981,8 +12998,8 @@ EXT_SYNC
 <td  class="td_unused">
 -
 </td>
-<td  class="td_unused">
-
+<td style="border: solid 1px black;" colspan=1  class="td_field">
+FPGA_IO_DIR
 </td>
 <td style="border: solid 1px black;" colspan=1  class="td_field">
 P_CNT_RST
@@ -13068,6 +13085,10 @@ OUTPUT_VALUE
 P_CNT_RST
 </b>[<i>read/write</i>]: pulses counter reset
 <br>resets the pulses counter
+<li><b>
+FPGA_IO_DIR
+</b>[<i>read/write</i>]: FPGA IO direction
+<br>Direction of FPGA IO
 </ul>
 <a name="EXT_SYNC_RAW_INPUT"></a>
 <h3><a name="sect_3_7">3.7. ext sync raw input</a></h3>

--- a/python/regs/masterfip_addrtable.py
+++ b/python/regs/masterfip_addrtable.py
 #  Register definitions for slave core: FMC masterFIP core registers
 #
-#  * File           : /home/gumas/projects/cti/fmcmasterfip/python/regs/masterfip_addrtable.py
-#  * Author         : auto-generated by wbgen2 from /home/gumas/projects/cti/fmcmasterfip/gateware/rtl/wbgen/fmc_masterfip_csr.wb
-#  * Created        : Tue Jun  7 16:15:16 2016
+#  * File           : /home/gumas/projects/cti/pts_masterfip/pts/fmcmasterfip/python/regs/masterfip_addrtable.py
+#  * Author         : auto-generated by wbgen2 from /home/gumas/projects/cti/pts_masterfip/pts/fmcmasterfip/gateware/rtl/wbgen/fmc_masterfip_csr.wb
+#  * Created        : Tue Mar  7 12:59:02 2017
 #
-#    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE /home/gumas/projects/cti/fmcmasterfip/gateware/rtl/wbgen/fmc_masterfip_csr.wb
+#    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE /home/gumas/projects/cti/pts_masterfip/pts/fmcmasterfip/gateware/rtl/wbgen/fmc_masterfip_csr.wb
 #    DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
 #

@@ -41,6 +41,7 @@ addr = {
        'ext_sync.tst' : [ 0x5, 0x8, "rw"], 
        'ext_sync.output_value' : [ 0x5, 0x10, "rw"], 
        'ext_sync.p_cnt_rst' : [ 0x5, 0x100, "rw"], 
+        'ext_sync.fpga_io_dir' : [ 0x5, 0x200, "rw"], 
    
    'ext_sync_raw_input' : [ 0x6, 0xffffffff, "r"],
    

--- a/python/test.c
+++ b/python/test.c
+void main(){
+	printf( "Hello word");
+	printf( "sdf asdkfds ")
+}
--- a/python/test03.py
+++ b/python/test03.py
--- a/python/test05.py
+++ b/python/test05.py
@@ -135,7 +135,7 @@ def main (card=None, default_directory='.',suite=None, serial=None):
                    # serial
                    "-s", serial,
                    # part
-                    "-p", "EDA-03098-V1-%d" % speed,
+                    "-p", "EDA-03098-V3-%d" % speed,
                    # output
                    "-o", sdbfs_path+"/IPMI-FRU" ]
                    )

--- a/python/test06.py
+++ b/python/test06.py