Do not use CWishboneAccessor in MT driver class. Revert to parent class CBusAccessor instead.

The reason is, not all designs provide a CWishboneAccessor, so it is better to refer to the parent class instead. Testbenches that use a child class (such as CWishboneAccessor) and want to call a function/task of that child class (such as set_mode()), can do so themselves.

Do not use CWishboneAccessor in MT driver class. Revert to parent class CBusAccessor instead.
The reason is, not all designs provide a CWishboneAccessor, so it is better to refer to the parent class instead. Testbenches that use a child class (such as CWishboneAccessor) and want to call a function/task of that child class (such as set_mode()), can do so themselves.
3f55ca7e · Dimitris Lampridis · 304f6990 · 70e9e78f · f1f97978 · 3f55ca7e
Commit 3f55ca7e authored Feb 01, 2019 by Dimitris Lampridis
7 changed files
--- a/urv-core @ 70e9e78f
+++ b/urv-core @ 70e9e78f
-Subproject commit 5c7e906ceb6b15f53830061c9087cce0befef13a
+Subproject commit 70e9e78f740aa7f4d8168ccaa003bf3924824284
--- a/wr-cores @ f1f97978
+++ b/wr-cores @ f1f97978
-Subproject commit 7a42cf8e9a39f72955c3fde2126c0b126037eaae
+Subproject commit f1f97978cea46eb6ccefc3c26ea86e56c4e85651
--- a/hdl/testbench/include/mock_turtle_driver.svh
+++ b/hdl/testbench/include/mock_turtle_driver.svh
@@ -27,7 +27,6 @@
 `define __MOCK_TURTLE_DRIVER_INCLUDED

 `include "simdrv_defs.svh"
- `include "if_wishbone_accessor.svh"
 `include "mt_cpu_csr_driver.svh"
 `include "mt_queue_message.svh"
 `include "mt_hmq_driver.svh"
@@ -58,7 +57,7 @@ typedef virtual IMockTurtleIRQ vIMockTurtleIRQ;
 // The main class, to monitor and drive the complete MT
 class MockTurtleDriver;
   protected string name;
-   protected CWishboneAccessor acc;
+   protected CBusAccessor acc;
   protected uint64_t base;
   protected uint32_t core_count;
   protected MTCPUControl csr;
@@ -67,7 +66,7 @@ class MockTurtleDriver;
   protected vIMockTurtleIRQ irq;
   MDebug dbg;

-   function  new ( CWishboneAccessor acc, uint64_t base,
+   function  new ( CBusAccessor acc, uint64_t base,
 		   vIMockTurtleIRQ irq, string name = "" );
      this.name = name;
      this.acc  = acc;
@@ -84,9 +83,8 @@ class MockTurtleDriver;
      $display (tmp);
   endtask // mdisplay

-   task init ( wb_cycle_type_t mode = PIPELINED );
+   task init ( );
      uint32_t slot_count;
-      wb_set_mode ( mode );
      // first init the config ROM, to be able to get core count etc.
      rom = new ( acc, base + 'he000 );
      rom.init();
@@ -126,10 +124,6 @@ class MockTurtleDriver;
      rom.dump();
   endtask // cfg_rom_dump

-   task wb_set_mode ( wb_cycle_type_t mode );
-      acc.set_mode ( mode );
-   endtask // wb_set_mode
-
   task enable_console_irq ( int core, int enable );
      csr.uart_int_enable ( core, enable );
   endtask // enable_console_irq

--- a/hdl/testbench/mock_turtle_core/main.sv
+++ b/hdl/testbench/mock_turtle_core/main.sv
@@ -152,13 +152,19 @@ module main;
 	$finish;
   endtask // check_final_result

+   CWishboneAccessor acc;
+
   initial begin

+      acc = Host.get_accessor();
+
+      acc.set_mode (PIPELINED);
+
      $timeformat (-6, 3, "us", 10);

      #10us;

-      drv = new (Host.get_accessor(), mt_base, IrqMonitor);
+      drv = new (acc, mt_base, IrqMonitor);

      drv.init();


--- a/hdl/testbench/mt_eth_ep/main.sv
+++ b/hdl/testbench/mt_eth_ep/main.sv
@@ -154,15 +154,22 @@ module main;

   MockTurtleDriver drv;

+   CWishboneAccessor acc;
+
   initial begin
+
      automatic WBPacketSink sink = new(U_wrf_sink.get_accessor());
      automatic WBPacketSource src  = new(U_wrf_source.get_accessor());

      $timeformat (-6, 3, "us", 10);

+      acc = Host.get_accessor();
+
+      acc.set_mode (PIPELINED);
+
      #10us;

-      drv = new (Host.get_accessor(), mt_base, IrqMonitor);
+      drv = new (acc, mt_base, IrqMonitor);

      drv.init();


--- a/hdl/testbench/spec_mt_demo/main.sv
+++ b/hdl/testbench/spec_mt_demo/main.sv
@@ -84,14 +84,20 @@ module main;

   MockTurtleDriver drv;

+   CWishboneAccessor acc;
+
   initial begin

      $timeformat (-6, 3, "us", 10);

+      acc = Host.get_accessor();
+
+      acc.set_mode (PIPELINED);
+
      @(posedge DUT.rst_sys_n);
      @(posedge DUT.clk_sys);

-      drv = new (Host.get_accessor(), mt_base, IrqMonitor);
+      drv = new (acc, mt_base, IrqMonitor);

      drv.init();


--- a/hdl/testbench/svec_mt_demo/main.sv
+++ b/hdl/testbench/svec_mt_demo/main.sv
@@ -99,14 +99,20 @@ module main;

   MockTurtleDriver drv;

+   CWishboneAccessor acc;
+
   initial begin

+      acc = Host.get_accessor();
+
+      acc.set_mode (PIPELINED);
+
      $timeformat (-6, 3, "us", 10);

      @(posedge DUT.rst_n_sys);
      @(posedge DUT.clk_sys);

-      drv = new (Host.get_accessor(), mt_base, IrqMonitor);
+      drv = new (acc, mt_base, IrqMonitor);

      drv.init();