Skip to content

M
Mock Turtle
Commit 612f65ed authored by Federico Vaga's avatar Federico Vaga
Browse files
Options

kernel: use mock-turtle IO functions 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 973b8690
Hide whitespace changes
Inline Side-by-side
Showing with 75 additions and 82 deletions
kernel/mockturtle-core.c
View file @ 612f65ed
......@@ -161,10 +161,9 @@ static ssize_t trtl_show_enable_mask(struct device *dev,
char *buf)
{
struct trtl_dev *trtl = to_trtl_dev(dev);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
return sprintf(buf, "0x%04x\n", reg_val);
}
......@@ -177,13 +176,12 @@ static ssize_t trtl_store_enable_mask(struct device *dev,
const char *buf, size_t count)
{
struct trtl_dev *trtl = to_trtl_dev(dev);
struct fmc_device *fmc = to_fmc_dev(trtl);
long val;
if (kstrtol(buf, 16, &val))
return -EINVAL;
fmc_writel(fmc, val, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
trtl_iowrite(trtl, val, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
return count;
}
......@@ -196,10 +194,9 @@ static ssize_t trtl_show_reset_mask(struct device *dev,
char *buf)
{
struct trtl_dev *trtl = to_trtl_dev(dev);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
return sprintf(buf, "0x%04x\n", reg_val);
}
......@@ -212,13 +209,12 @@ static ssize_t trtl_store_reset_mask(struct device *dev,
const char *buf, size_t count)
{
struct trtl_dev *trtl = to_trtl_dev(dev);
struct fmc_device *fmc = to_fmc_dev(trtl);
long val;
if (kstrtol(buf, 16, &val))
return -EINVAL;
fmc_writel(fmc, val, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
trtl_iowrite(trtl, val, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
return count;
}
......@@ -300,7 +296,6 @@ static void trtl_dev_release(struct device *dev)
*/
static long trtl_ioctl_io(struct trtl_dev *trtl, void __user *uarg)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
struct trtl_smem_io io;
uint32_t addr;
int err;
......@@ -314,14 +309,14 @@ static long trtl_ioctl_io(struct trtl_dev *trtl, void __user *uarg)
/* read */
addr = trtl->base_smem + io.addr;
} else {
fmc_writel(fmc, io.mod, trtl->base_csr + WRN_CPU_CSR_REG_SMEM_OP);
trtl_iowrite(trtl, io.mod, trtl->base_csr + WRN_CPU_CSR_REG_SMEM_OP);
/* write */
addr = trtl->base_smem + io.addr;
fmc_writel(fmc, io.value, addr);
trtl_iowrite(trtl, io.value, addr);
}
/* read value from SMEM */
io.value = fmc_readl(fmc, addr);
io.value = trtl_ioread(trtl, addr);
return copy_to_user(uarg, &io, sizeof(struct trtl_smem_io));
}
......@@ -364,7 +359,6 @@ static ssize_t trtl_write(struct file *f, const char __user *buf,
size_t count, loff_t *offp)
{
struct trtl_dev *trtl = f->private_data;
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t val, addr;
int err, i;
......@@ -384,7 +378,7 @@ static ssize_t trtl_write(struct file *f, const char __user *buf,
*offp, count);
return -EFAULT;
}
fmc_writel(fmc, val, addr + i);
trtl_iowrite(trtl, val, addr + i);
}
......@@ -400,7 +394,6 @@ static ssize_t trtl_read(struct file *f, char __user *buf,
size_t count, loff_t *offp)
{
struct trtl_dev *trtl = f->private_data;
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t val, addr;
int err, i;
......@@ -413,7 +406,7 @@ static ssize_t trtl_read(struct file *f, char __user *buf,
addr = trtl->base_smem + *offp;
for (i = 0; i < count; i += 4) {
val = fmc_readl(fmc, addr + i);
val = trtl_ioread(trtl, addr + i);
err = copy_to_user(buf + i, &val, 4);
if (err)
return -EFAULT;
......@@ -530,7 +523,7 @@ static int trtl_probe_hmq(struct trtl_dev *trtl, unsigned int slot,
}
/* Get HMQ dimensions */
val = fmc_readl(fmc, hmq->base_sr + MQUEUE_SLOT_STATUS);
val = trtl_ioread(trtl, hmq->base_sr + MQUEUE_SLOT_STATUS);
hmq->max_width = TRTL_SLOT_CFG(WIDTH, val);
hmq->max_depth = TRTL_SLOT_CFG(ENTRIES, val);
hmq->buf.max_msg_size = hmq->max_width * 4;
......@@ -539,7 +532,7 @@ static int trtl_probe_hmq(struct trtl_dev *trtl, unsigned int slot,
val, hmq->max_width, hmq->max_depth);
spin_lock_init(&hmq->lock);
/* Flush the content of the slot */
fmc_writel(fmc, MQUEUE_CMD_PURGE,
trtl_iowrite(trtl, MQUEUE_CMD_PURGE,
hmq->base_sr + MQUEUE_SLOT_COMMAND);
return 0;
......@@ -597,11 +590,11 @@ int trtl_probe(struct fmc_device *fmc)
/* Get the Application ID */
trtl->app_id = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_APP_ID);
trtl->app_id = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_APP_ID);
dev_info(&fmc->dev, "Application ID: 0x%08x\n", trtl->app_id);
/* Get and check the number of COREs */
trtl->n_cpu = fmc_readl(fmc,
trtl->n_cpu = trtl_ioread(trtl,
trtl->base_csr + WRN_CPU_CSR_REG_CORE_COUNT);
if (trtl->n_cpu < 1 || trtl->n_cpu > TRTL_MAX_CPU) {
dev_err(&fmc->dev, "invalid number of CPU (%d)\n", trtl->n_cpu);
......@@ -644,7 +637,7 @@ int trtl_probe(struct fmc_device *fmc)
}
/* Get and check the number of HMQ slots */
tmp = fmc_readl(fmc, trtl->base_gcr + MQUEUE_GCR_SLOT_COUNT);
tmp = trtl_ioread(trtl, trtl->base_gcr + MQUEUE_GCR_SLOT_COUNT);
trtl->n_hmq_in = tmp & MQUEUE_GCR_SLOT_COUNT_N_IN_MASK;
trtl->n_hmq_out = (tmp & MQUEUE_GCR_SLOT_COUNT_N_OUT_MASK) >>
MQUEUE_GCR_SLOT_COUNT_N_OUT_SHIFT;
......@@ -689,8 +682,8 @@ int trtl_probe(struct fmc_device *fmc)
trtl->irq_mask |= (((1 << trtl->n_hmq_out) - 1)
<< MQUEUE_GCR_IRQ_MASK_OUT_SHIFT);
fmc_writel(fmc, trtl->irq_mask, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
tmp = fmc_readl(fmc, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
trtl_iowrite(trtl, trtl->irq_mask, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
tmp = trtl_ioread(trtl, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
/* Enable debug interrupts */
fmc->irq = trtl->base_core + 1;
......@@ -709,7 +702,7 @@ int trtl_probe(struct fmc_device *fmc)
if (dbg_max_msg > 0) {
/* Enable interrupts only when we have a buffere where
store messages */
fmc_writel(fmc, 0xFFFFFFFF/*(trtl->n_cpu - 1)*/,
trtl_iowrite(trtl, 0xFFFFFFFF/*(trtl->n_cpu - 1)*/,
trtl->base_csr + WRN_CPU_CSR_REG_DBG_IMSK);
}
......@@ -746,11 +739,11 @@ int trtl_remove(struct fmc_device *fmc)
struct trtl_dev *trtl = fmc_get_drvdata(fmc);
int i;
fmc_writel(fmc, 0x0, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
trtl_iowrite(trtl, 0x0, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
fmc->irq = trtl->base_core;
fmc_irq_free(fmc);
fmc_writel(fmc, 0x0, trtl->base_csr + WRN_CPU_CSR_REG_DBG_IMSK);
trtl_iowrite(trtl, 0x0, trtl->base_csr + WRN_CPU_CSR_REG_DBG_IMSK);
fmc->irq = trtl->base_core + 1;
fmc_irq_free(fmc);
......
kernel/mockturtle-cpu.c
View file @ 612f65ed
......@@ -34,12 +34,11 @@
*/
void trtl_cpu_reset_set(struct trtl_dev *trtl, uint8_t mask)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
reg_val |= (mask & 0xFF);
fmc_writel(fmc, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
trtl_iowrite(trtl, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
}
/**
......@@ -47,12 +46,11 @@ void trtl_cpu_reset_set(struct trtl_dev *trtl, uint8_t mask)
*/
static void trtl_cpu_reset_clr(struct trtl_dev *trtl, uint8_t mask)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
reg_val &= (~mask & 0xFF);
fmc_writel(fmc, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
trtl_iowrite(trtl, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
}
/**
......@@ -64,10 +62,9 @@ static ssize_t trtl_show_reset(struct device *dev,
{
struct trtl_cpu *cpu = to_trtl_cpu(dev);
struct trtl_dev *trtl = to_trtl_dev(dev->parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_RESET);
return sprintf(buf, "%d\n", !!(reg_val & (1 << cpu->index)));
}
......@@ -102,12 +99,11 @@ static ssize_t trtl_store_reset(struct device *dev,
*/
void trtl_cpu_enable_set(struct trtl_dev *trtl, uint8_t mask)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
reg_val |= (mask & 0xFF);
fmc_writel(fmc, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
trtl_iowrite(trtl, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
}
/**
......@@ -116,12 +112,11 @@ void trtl_cpu_enable_set(struct trtl_dev *trtl, uint8_t mask)
*/
static void trtl_cpu_enable_clr(struct trtl_dev *trtl, uint8_t mask)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
reg_val &= (~mask & 0xFF);
fmc_writel(fmc, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
trtl_iowrite(trtl, reg_val, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
}
/**
......@@ -133,10 +128,9 @@ static ssize_t trtl_show_enable(struct device *dev,
{
struct trtl_cpu *cpu = to_trtl_cpu(dev);
struct trtl_dev *trtl = to_trtl_dev(dev->parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t reg_val;
reg_val = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
reg_val = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_ENABLE);
return sprintf(buf, "%d\n", !!(reg_val & (1 << cpu->index)));
}
......@@ -190,13 +184,12 @@ static int trtl_cpu_firmware_load(struct trtl_cpu *cpu, void *fw_buf,
size_t count, loff_t off)
{
struct trtl_dev *trtl = to_trtl_dev(cpu->dev.parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t *fw = fw_buf, word, word_rb;
int size, offset, i, cpu_memsize;
/* Select the CPU memory to write */
fmc_writel(fmc, cpu->index, trtl->base_csr + WRN_CPU_CSR_REG_CORE_SEL);
cpu_memsize = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_CORE_MEMSIZE );
trtl_iowrite(trtl, cpu->index, trtl->base_csr + WRN_CPU_CSR_REG_CORE_SEL);
cpu_memsize = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_CORE_MEMSIZE );
if (off + count > cpu_memsize) {
dev_err(&cpu->dev,
......@@ -214,21 +207,21 @@ static int trtl_cpu_firmware_load(struct trtl_cpu *cpu, void *fw_buf,
/* Clean CPU memory */
for (i = offset; i < cpu_memsize / 1024; ++i) {
fmc_writel(fmc, i, trtl->base_csr + WRN_CPU_CSR_REG_UADDR);
trtl_iowrite(trtl, i, trtl->base_csr + WRN_CPU_CSR_REG_UADDR);
udelay(1);
fmc_writel(fmc, 0, trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
trtl_iowrite(trtl, 0, trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
udelay(1);
}
/* Load the firmware */
for (i = 0; i < size; ++i) {
word = cpu_to_be32(fw[i]);
fmc_writel(fmc, i + offset,
trtl_iowrite(trtl, i + offset,
trtl->base_csr + WRN_CPU_CSR_REG_UADDR);
udelay(1);
fmc_writel(fmc, word, trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
trtl_iowrite(trtl, word, trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
udelay(1);
word_rb = fmc_readl(fmc,
word_rb = trtl_ioread(trtl,
trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
udelay(1);
if (word != word_rb) {
......@@ -246,7 +239,6 @@ static int trtl_cpu_firmware_dump(struct trtl_cpu *cpu, void *fw_buf,
size_t count, loff_t off)
{
struct trtl_dev *trtl = to_trtl_dev(cpu->dev.parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t *fw = fw_buf, word;
int size, offset, i, cpu_memsize;
......@@ -256,9 +248,9 @@ static int trtl_cpu_firmware_dump(struct trtl_cpu *cpu, void *fw_buf,
offset = off / 4;
/* Select the CPU memory to write */
fmc_writel(fmc, cpu->index, trtl->base_csr + WRN_CPU_CSR_REG_CORE_SEL);
trtl_iowrite(trtl, cpu->index, trtl->base_csr + WRN_CPU_CSR_REG_CORE_SEL);
cpu_memsize = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_CORE_MEMSIZE );
cpu_memsize = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_CORE_MEMSIZE );
if (off + count > cpu_memsize) {
dev_err(&cpu->dev, "Cannot dump firmware: size limit %d byte\n",
......@@ -268,10 +260,10 @@ static int trtl_cpu_firmware_dump(struct trtl_cpu *cpu, void *fw_buf,
/* Dump the firmware */
for (i = 0; i < size; ++i) {
fmc_writel(fmc, i + offset,
trtl_iowrite(trtl, i + offset,
trtl->base_csr + WRN_CPU_CSR_REG_UADDR);
udelay(1);
word = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
word = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_UDATA);
udelay(1);
fw[i] = be32_to_cpu(word);
}
......
kernel/mockturtle-dbg.c
View file @ 612f65ed
......@@ -136,7 +136,7 @@ irqreturn_t trtl_irq_handler_debug(int irq_core_base, void *arg)
char c;
int i;
status = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_DBG_POLL);
status = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_DBG_POLL);
do_irq:
i = -1;
while (status && ++i < trtl->n_cpu) {
......@@ -147,8 +147,8 @@ do_irq:
/* Select the CPU to use */
spin_lock(&trtl->cpu[i].lock);
fmc_writel(fmc, i, trtl->base_csr + WRN_CPU_CSR_REG_CORE_SEL);
c = fmc_readl(fmc,
trtl_iowrite(trtl, i, trtl->base_csr + WRN_CPU_CSR_REG_CORE_SEL);
c = trtl_ioread(trtl,
trtl->base_csr + WRN_CPU_CSR_REG_DBG_MSG);
cb = &trtl->cpu[i].cbuf;
if (cb->buf) {
......@@ -163,7 +163,7 @@ do_irq:
spin_unlock(&trtl->cpu[i].lock);
}
status = fmc_readl(fmc, trtl->base_csr + WRN_CPU_CSR_REG_DBG_POLL);
status = trtl_ioread(trtl, trtl->base_csr + WRN_CPU_CSR_REG_DBG_POLL);
if (status)
goto do_irq;
......
kernel/mockturtle-drv.h
View file @ 612f65ed
......@@ -191,6 +191,21 @@ struct trtl_dev {
uint32_t message_sequence; /**< message sequence number */
};
static inline u32 trtl_ioread(struct trtl_dev *trtl, int addr)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
return fmc_readl(fmc, addr);
}
static inline void trtl_iowrite(struct trtl_dev *trtl,
u32 value, int addr)
{
struct fmc_device *fmc = to_fmc_dev(trtl);
fmc_writel(fmc, value, addr);
}
/* Global data */
extern struct device *minors[TRTL_MAX_MINORS];
/* CPU data */
......
kernel/mockturtle-hmq.c
View file @ 612f65ed
......@@ -117,10 +117,9 @@ static ssize_t trtl_show_full(struct device *dev,
{
struct trtl_hmq *hmq = to_trtl_hmq(dev);
struct trtl_dev *trtl = to_trtl_dev(dev->parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t status;
status = fmc_readl(fmc, hmq->base_sr + MQUEUE_SLOT_STATUS);
status = trtl_ioread(trtl, hmq->base_sr + MQUEUE_SLOT_STATUS);
return sprintf(buf, "%d\n", !!(status & 0x1));
}
......@@ -135,10 +134,9 @@ static ssize_t trtl_show_empty(struct device *dev,
{
struct trtl_hmq *hmq = to_trtl_hmq(dev);
struct trtl_dev *trtl = to_trtl_dev(dev->parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t status;
status = fmc_readl(fmc, hmq->base_sr + MQUEUE_SLOT_STATUS);
status = trtl_ioread(trtl, hmq->base_sr + MQUEUE_SLOT_STATUS);
return sprintf(buf, "%d\n", !!(status & 0x2));
}
......@@ -153,10 +151,9 @@ static ssize_t trtl_show_count(struct device *dev,
{
struct trtl_hmq *hmq = to_trtl_hmq(dev);
struct trtl_dev *trtl = to_trtl_dev(dev->parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t status;
status = fmc_readl(fmc, hmq->base_sr + MQUEUE_SLOT_STATUS);
status = trtl_ioread(trtl, hmq->base_sr + MQUEUE_SLOT_STATUS);
return sprintf(buf, "%d\n", ((status >> 2) & 0xFF));
}
......@@ -435,7 +432,6 @@ static ssize_t trtl_hmq_write(struct file *f, const char __user *buf,
struct trtl_hmq_user *user = f->private_data;
struct trtl_hmq *hmq = user->hmq;
struct trtl_dev *trtl = to_trtl_dev(hmq->dev.parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
struct trtl_msg msg;
unsigned long flags;
unsigned int i, n;
......@@ -506,9 +502,9 @@ static ssize_t trtl_hmq_write(struct file *f, const char __user *buf,
/* Enable interrupts for CPU input SLOT */
if (hmq_in_irq) {
mask = fmc_readl(fmc, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
mask = trtl_ioread(trtl, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
mask |= (1 << (hmq->index + MQUEUE_GCR_IRQ_MASK_IN_SHIFT));
fmc_writel(fmc, mask, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
trtl_iowrite(trtl, mask, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
}
/* Update counter */
......@@ -539,7 +535,6 @@ static int trtl_message_push(struct trtl_hmq *hmq, void *buf,
unsigned int size, uint32_t *seq)
{
struct trtl_dev *trtl = to_trtl_dev(hmq->dev.parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
uint32_t freeslot, *data = buf;
int i;
......@@ -549,27 +544,27 @@ static int trtl_message_push(struct trtl_hmq *hmq, void *buf,
size, hmq->buf.max_msg_size);
return -EINVAL;
}
freeslot = fmc_readl(fmc, hmq->base_sr + MQUEUE_SLOT_STATUS)
freeslot = trtl_ioread(trtl, hmq->base_sr + MQUEUE_SLOT_STATUS)
& MQUEUE_SLOT_STATUS_OCCUPIED_MASK
>> MQUEUE_SLOT_STATUS_OCCUPIED_SHIFT;
if (!freeslot)
return -EAGAIN;
/* Get the slot in order to write into it */
fmc_writel(fmc, MQUEUE_CMD_CLAIM, hmq->base_sr + MQUEUE_SLOT_COMMAND);
trtl_iowrite(trtl, MQUEUE_CMD_CLAIM, hmq->base_sr + MQUEUE_SLOT_COMMAND);
*seq = ++trtl->message_sequence;
/* Assign a sequence number to the message */
data[1] = *seq;
/* Write data into the slot */
for (i = 0; i < size / 4; ++i) {
fmc_writel(fmc, data[i],
trtl_iowrite(trtl, data[i],
hmq->base_sr + MQUEUE_SLOT_DATA_START + i * 4);
dev_vdbg(&hmq->dev, "From HOST to MT data[%i] = 0x%08x\n",
i, data[i]);
}
/* The slot is ready to be sent to the CPU */
fmc_writel(fmc, MQUEUE_CMD_READY | ((size / 4) & 0xFF),
trtl_iowrite(trtl, MQUEUE_CMD_READY | ((size / 4) & 0xFF),
hmq->base_sr + MQUEUE_SLOT_COMMAND);
hmq->stats.count++;
......@@ -886,7 +881,6 @@ const struct file_operations trtl_hmq_fops = {
static void trtl_irq_handler_input(struct trtl_hmq *hmq)
{
struct trtl_dev *trtl = to_trtl_dev(hmq->dev.parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
struct trtl_msg_element *msgel;
unsigned long flags;
uint32_t mask, seq;
......@@ -907,9 +901,9 @@ static void trtl_irq_handler_input(struct trtl_hmq *hmq)
* interrupts
*/
spin_lock_irqsave(&hmq->lock, flags);
mask = fmc_readl(fmc, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
mask = trtl_ioread(trtl, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
mask &= ~(1 << (hmq->index + MQUEUE_GCR_IRQ_MASK_IN_SHIFT));
fmc_writel(fmc, mask, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
trtl_iowrite(trtl, mask, trtl->base_gcr + MQUEUE_GCR_IRQ_MASK);
spin_unlock_irqrestore(&hmq->lock, flags);
/* Wake up processes waiting for this */
......@@ -936,7 +930,6 @@ static void trtl_irq_handler_input(struct trtl_hmq *hmq)
static void trtl_irq_handler_output(struct trtl_hmq *hmq)
{
struct trtl_dev *trtl = to_trtl_dev(hmq->dev.parent);
struct fmc_device *fmc = to_fmc_dev(trtl);
struct mturtle_hmq_buffer *buf = &hmq->buf;
uint32_t status, *buffer = buf->mem + buf->ptr_w;
size_t size;
......@@ -947,18 +940,18 @@ static void trtl_irq_handler_output(struct trtl_hmq *hmq)
spin_lock_irqsave(&hmq->lock, flags);
/* Get the message */
/* Get information about the incoming slot */
status = fmc_readl(fmc, hmq->base_sr + MQUEUE_SLOT_STATUS);
status = trtl_ioread(trtl, hmq->base_sr + MQUEUE_SLOT_STATUS);
size = (status & MQUEUE_SLOT_STATUS_MSG_SIZE_MASK);
size >>= MQUEUE_SLOT_STATUS_MSG_SIZE_SHIFT;
/* Read data from the slot */
for (i = 0; i < size; ++i) {
buffer[i] = fmc_readl(fmc,
buffer[i] = trtl_ioread(trtl,
hmq->base_sr + MQUEUE_SLOT_DATA_START + i * 4);
/*dev_vdbg(&hmq->dev, "From MT to HOST data[%i] = 0x%08x\n",
i, buffer[i]);*/
}
/* Discard the slot content */
fmc_writel(fmc, MQUEUE_CMD_DISCARD, hmq->base_sr + MQUEUE_SLOT_COMMAND);
trtl_iowrite(trtl, MQUEUE_CMD_DISCARD, hmq->base_sr + MQUEUE_SLOT_COMMAND);
spin_unlock_irqrestore(&hmq->lock, flags);
hmq->stats.count++;
......@@ -1017,7 +1010,7 @@ irqreturn_t trtl_irq_handler(int irq_core_base, void *arg)
int i, j, n_disp = 0;
/* Get the source of interrupt */
status = fmc_readl(fmc, trtl->base_gcr + MQUEUE_GCR_SLOT_STATUS);
status = trtl_ioread(trtl, trtl->base_gcr + MQUEUE_GCR_SLOT_STATUS);
if (!status)
return IRQ_NONE;
status &= trtl->irq_mask;
......@@ -1043,7 +1036,7 @@ irqreturn_t trtl_irq_handler(int irq_core_base, void *arg)
/*
* check if other interrupts occurs in the meanwhile
*/
status = fmc_readl(fmc, trtl->base_gcr + MQUEUE_GCR_SLOT_STATUS);
status = trtl_ioread(trtl, trtl->base_gcr + MQUEUE_GCR_SLOT_STATUS);
status &= trtl->irq_mask;
if (status && n_disp < hmq_max_irq_loop)
goto dispatch_irq;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment