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Mock Turtle
Commit 6beecf5a authored by Dimitris Lampridis's avatar Dimitris Lampridis
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sim: expand MT simulation SV classes

parent 54b56e39
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Inline Side-by-side
Showing with 66 additions and 11 deletions
hdl/testbench/include/mock_turtle_driver.svh
View file @ 6beecf5a
......@@ -62,8 +62,8 @@ class MockTurtleDriver;
protected uint32_t core_count;
protected MTCPUControl csr;
protected MQueueHost hmq[];
protected MTConfigRom rom;
protected vIMockTurtleIRQ irq;
MTConfigRom rom;
MDebug dbg;
function new ( CBusAccessor acc, uint64_t base,
......@@ -146,6 +146,15 @@ class MockTurtleDriver;
acc.write (base + 32'h1_0000 + offset, val);
endtask // smem_write
function bit pending_cpu_notifications (uint32_t core);
return csr.notify_queue[core].size();
endfunction // pending_cpu_notification
task get_single_cpu_notification (int core, ref uint32_t val);
if ( pending_cpu_notifications (core) )
val = csr.notify_queue[core].pop_front();
endtask // get_single_cpu_notification
task get_cpu_notifications (int core, ref t_notify_queue ntf);
ntf = csr.notify_queue[core];
csr.notify_queue[core] = {};
......
hdl/testbench/include/mt_config_rom_driver.svh
View file @ 6beecf5a
......@@ -28,6 +28,22 @@
`include "simdrv_defs.svh"
`define TRTL_CONFIG_ROM_MQ_ENTRIES_SHIFT 16
`define TRTL_CONFIG_ROM_MQ_ENTRIES_MASK 32'h00FF0000
`define TRTL_CONFIG_ROM_MQ_PAYLOAD_SHIFT 8
`define TRTL_CONFIG_ROM_MQ_PAYLOAD_MASK 32'h0000FF00
`define TRTL_CONFIG_ROM_MQ_HEADER_SHIFT 0
`define TRTL_CONFIG_ROM_MQ_HEADER_MASK 32'h000000FF
`define TRTL_CONFIG_ROM_MQ_SIZE_ENTRIES(_size) (1 << ((_size & `TRTL_CONFIG_ROM_MQ_ENTRIES_MASK) >> \
`TRTL_CONFIG_ROM_MQ_ENTRIES_SHIFT))
`define TRTL_CONFIG_ROM_MQ_SIZE_PAYLOAD(_size) (1 << ((_size & `TRTL_CONFIG_ROM_MQ_PAYLOAD_MASK) >> \
`TRTL_CONFIG_ROM_MQ_PAYLOAD_SHIFT))
`define TRTL_CONFIG_ROM_MQ_SIZE_HEADER(_size) (1 << ((_size & `TRTL_CONFIG_ROM_MQ_HEADER_MASK) >> \
`TRTL_CONFIG_ROM_MQ_HEADER_SHIFT))
class MTConfigRom;
protected CBusAccessor m_acc;
protected uint64_t m_base;
......@@ -72,10 +88,26 @@ class MTConfigRom;
return read(16 + core);
endfunction // getHmqSlotCount
function uint32_t getHmqDimensions(int core, int hmq);
return read(128 + 16 * core + 2 * hmq);
endfunction // getHmqDimensions
function uint32_t getHmqEndpoint(int core, int hmq);
return read(128 + 16 * core + 2 * hmq + 1);
endfunction // getHmqEndpoint
function uint32_t getRmqSlotCount(int core);
return read(24 + core);
endfunction // getRmqSlotCount
function uint32_t getRmqDimensions(int core, int rmq);
return read(256 + 16 * core + 2 * rmq);
endfunction // getRmqDimensions
function uint32_t getRmqEndpoint(int core, int rmq);
return read(256 + 16 * core + 2 * rmq + 1);
endfunction // getRmqEndpoint
task dump ();
int i;
......@@ -109,11 +141,11 @@ class MTConfigRom;
begin
uint32_t val;
$display ( " HMQ #%0d", j );
val = read(128 + 16 * i + 2 * j);
$display ( " Entries bits : %0d", (val & 'h00ff0000) >> 16 );
$display ( " Width bits : %0d", (val & 'h0000ff00) >> 8 );
$display ( " Header bits : %0d", (val & 'h000000ff) );
val = read(128 + 16 * i + 2 * j + 1);
val = getHmqDimensions(i, j);
$display ( " Entries bits : %0d", `TRTL_CONFIG_ROM_MQ_SIZE_ENTRIES(val));
$display ( " Width bits : %0d", `TRTL_CONFIG_ROM_MQ_SIZE_PAYLOAD(val));
$display ( " Header bits : %0d", `TRTL_CONFIG_ROM_MQ_SIZE_HEADER(val));
val = getHmqEndpoint(i, j);
$display ( " Endpoint ID : %0x", val );
end
$display ( " RMQ slots : %0d", rmq_slots );
......@@ -121,11 +153,11 @@ class MTConfigRom;
begin
uint32_t val;
$display ( " RMQ #%0d", j );
val = read(256 + 16 * i + 2 * j);
$display ( " Entries bits : %0d", (val & 'h00ff0000) >> 16 );
$display ( " Width bits : %0d", (val & 'h0000ff00) >> 8 );
$display ( " Header bits : %0d", (val & 'h000000ff) );
val = read(256 + 16 * i + 2 * j + 1);
val = getRmqDimensions(i, j);
$display ( " Entries bits : %0d", `TRTL_CONFIG_ROM_MQ_SIZE_ENTRIES(val));
$display ( " Width bits : %0d", `TRTL_CONFIG_ROM_MQ_SIZE_PAYLOAD(val));
$display ( " Header bits : %0d", `TRTL_CONFIG_ROM_MQ_SIZE_HEADER(val));
val = getRmqEndpoint(i, j);
$display ( " Endpoint ID : %0x", val );
end
end
......
hdl/testbench/include/mt_cpu_csr_driver.svh
View file @ 6beecf5a
......@@ -37,6 +37,16 @@
`define SMEM_OP_FLIP 5
`define SMEM_OP_TEST_AND_SET 6
`define TRTL_CPU_NOTIFY_APPLICATION_MAX 64
enum {
TRTL_CPU_NOTIFY_APPLICATION = `TRTL_CPU_NOTIFY_APPLICATION_MAX,
TRTL_CPU_NOTIFY_INIT,
TRTL_CPU_NOTIFY_MAIN,
TRTL_CPU_NOTIFY_EXIT,
TRTL_CPU_NOTIFY_ERR
} trtl_cpu_notification;
typedef uint32_t t_notify_queue[$];
class MTCPUControl;
......
hdl/testbench/include/mt_queue_message.svh
View file @ 6beecf5a
......@@ -26,6 +26,10 @@
`ifndef __MT_MQUEUE_MSG_INCLUDED
`define __MT_MQUEUE_MSG_INCLUDED
`define TRTL_HMQ_HEADER_FLAG_SYNC (1 << 0)
`define TRTL_HMQ_HEADER_FLAG_ACK (1 << 1)
`define TRTL_HMQ_HEADER_FLAG_RPC (1 << 2)
typedef uint32_t u32_queue[$];
typedef struct {
......
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